Patch "kselftest/arm64: mte: Fix MTE feature detection" has been added to the 5.10-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    kselftest/arm64: mte: Fix MTE feature detection

to the 5.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     kselftest-arm64-mte-fix-mte-feature-detection.patch
and it can be found in the queue-5.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit cc7262bd289691188b1f318e1d75692d02c644d9
Author: Andre Przywara <andre.przywara@xxxxxxx>
Date:   Fri Mar 19 16:53:29 2021 +0000

    kselftest/arm64: mte: Fix MTE feature detection
    
    [ Upstream commit 592432862cc4019075a7196d9961562c49507d6f ]
    
    To check whether the CPU and kernel support the MTE features we want
    to test, we use an (emulated) CPU ID register read. However we only
    check against a very particular feature version (0b0010), even though
    the ARM ARM promises ID register features to be backwards compatible.
    
    While this could be fixed by using ">=" instead of "==", we should
    actually use the explicit HWCAP2_MTE hardware capability, exposed by the
    kernel via the ELF auxiliary vectors.
    
    That moves this responsibility to the kernel, and fixes running the
    tests on machines with FEAT_MTE3 capability.
    
    Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>
    Reviewed-by: Mark Brown <broone@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20210319165334.29213-7-andre.przywara@xxxxxxx
    Signed-off-by: Catalin Marinas <catalin.marinas@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/tools/testing/selftests/arm64/mte/mte_common_util.c b/tools/testing/selftests/arm64/mte/mte_common_util.c
index 39f8908988ea..70665ba88cbb 100644
--- a/tools/testing/selftests/arm64/mte/mte_common_util.c
+++ b/tools/testing/selftests/arm64/mte/mte_common_util.c
@@ -278,22 +278,13 @@ int mte_switch_mode(int mte_option, unsigned long incl_mask)
 	return 0;
 }
 
-#define ID_AA64PFR1_MTE_SHIFT		8
-#define ID_AA64PFR1_MTE			2
-
 int mte_default_setup(void)
 {
-	unsigned long hwcaps = getauxval(AT_HWCAP);
+	unsigned long hwcaps2 = getauxval(AT_HWCAP2);
 	unsigned long en = 0;
 	int ret;
 
-	if (!(hwcaps & HWCAP_CPUID)) {
-		ksft_print_msg("FAIL: CPUID registers unavailable\n");
-		return KSFT_FAIL;
-	}
-	/* Read ID_AA64PFR1_EL1 register */
-	asm volatile("mrs %0, id_aa64pfr1_el1" : "=r"(hwcaps) : : "memory");
-	if (((hwcaps >> ID_AA64PFR1_MTE_SHIFT) & MT_TAG_MASK) != ID_AA64PFR1_MTE) {
+	if (!(hwcaps2 & HWCAP2_MTE)) {
 		ksft_print_msg("FAIL: MTE features unavailable\n");
 		return KSFT_SKIP;
 	}