Patch "pinctrl: microchip-sgpio: Fix wrong register offset for IRQ trigger" has been added to the 5.11-stable tree

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This is a note to let you know that I've just added the patch titled

    pinctrl: microchip-sgpio: Fix wrong register offset for IRQ trigger

to the 5.11-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     pinctrl-microchip-sgpio-fix-wrong-register-offset-for-irq-trigger.patch
and it can be found in the queue-5.11 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 5d5f2919273d1089a00556cad68e7f462f3dd2eb Mon Sep 17 00:00:00 2001
From: Lars Povlsen <lars.povlsen@xxxxxxxxxxxxx>
Date: Wed, 3 Feb 2021 13:38:25 +0100
Subject: pinctrl: microchip-sgpio: Fix wrong register offset for IRQ trigger

From: Lars Povlsen <lars.povlsen@xxxxxxxxxxxxx>

commit 5d5f2919273d1089a00556cad68e7f462f3dd2eb upstream.

This patch fixes using a wrong register offset when configuring an IRQ
trigger type.

Fixes: be2dc859abd4 ("pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)")
Reported-by: Gustavo A. R. Silva <gustavoars@xxxxxxxxxx>
Signed-off-by: Lars Povlsen <lars.povlsen@xxxxxxxxxxxxx>
Reviewed-by: Gustavo A. R. Silva <gustavoars@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20210203123825.611576-1-lars.povlsen@xxxxxxxxxxxxx
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
 drivers/pinctrl/pinctrl-microchip-sgpio.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/pinctrl/pinctrl-microchip-sgpio.c
+++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c
@@ -572,7 +572,7 @@ static void microchip_sgpio_irq_settype(
 	/* Type value spread over 2 registers sets: low, high bit */
 	sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER, addr.bit,
 			 BIT(addr.port), (!!(type & 0x1)) << addr.port);
-	sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER + SGPIO_MAX_BITS, addr.bit,
+	sgpio_clrsetbits(bank->priv, REG_INT_TRIGGER, SGPIO_MAX_BITS + addr.bit,
 			 BIT(addr.port), (!!(type & 0x2)) << addr.port);
 
 	if (type == SGPIO_INT_TRG_LEVEL)


Patches currently in stable-queue which might be from lars.povlsen@xxxxxxxxxxxxx are

queue-5.11/pinctrl-microchip-sgpio-fix-wrong-register-offset-for-irq-trigger.patch



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