This is a note to let you know that I've just added the patch titled riscv: Correct SPARSEMEM configuration to the 5.10-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: riscv-correct-sparsemem-configuration.patch and it can be found in the queue-5.10 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From a5406a7ff56e63376c210b06072aa0ef23473366 Mon Sep 17 00:00:00 2001 From: Kefeng Wang <wangkefeng.wang@xxxxxxxxxx> Date: Mon, 15 Mar 2021 20:03:07 +0800 Subject: riscv: Correct SPARSEMEM configuration From: Kefeng Wang <wangkefeng.wang@xxxxxxxxxx> commit a5406a7ff56e63376c210b06072aa0ef23473366 upstream. There are two issues for RV32, 1) if use FLATMEM, it is useless to enable SPARSEMEM_STATIC. 2) if use SPARSMEM, both SPARSEMEM_VMEMMAP and SPARSEMEM_STATIC is enabled. Fixes: d95f1a542c3d ("RISC-V: Implement sparsemem") Signed-off-by: Kefeng Wang <wangkefeng.wang@xxxxxxxxxx> Cc: stable@xxxxxxxxxxxxxxx Signed-off-by: Palmer Dabbelt <palmerdabbelt@xxxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/riscv/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -84,7 +84,6 @@ config RISCV select PCI_MSI if PCI select RISCV_INTC select RISCV_TIMER if RISCV_SBI - select SPARSEMEM_STATIC if 32BIT select SPARSE_IRQ select SYSCTL_EXCEPTION_TRACE select THREAD_INFO_IN_TASK @@ -145,7 +144,8 @@ config ARCH_FLATMEM_ENABLE config ARCH_SPARSEMEM_ENABLE def_bool y depends on MMU - select SPARSEMEM_VMEMMAP_ENABLE + select SPARSEMEM_STATIC if 32BIT && SPARSMEM + select SPARSEMEM_VMEMMAP_ENABLE if 64BIT config ARCH_SELECT_MEMORY_MODEL def_bool ARCH_SPARSEMEM_ENABLE Patches currently in stable-queue which might be from wangkefeng.wang@xxxxxxxxxx are queue-5.10/riscv-correct-sparsemem-configuration.patch