This is a note to let you know that I've just added the patch titled
drm/i915/gvt: Fix mmio handler break on BXT/APL.
to the 5.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-i915-gvt-fix-mmio-handler-break-on-bxt-apl.patch
and it can be found in the queue-5.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From foo@baz Fri Mar 19 10:39:38 AM CET 2021
From: Colin Xu <colin.xu@xxxxxxxxx>
Date: Wed, 17 Mar 2021 10:55:01 +0800
Subject: drm/i915/gvt: Fix mmio handler break on BXT/APL.
To: stable@xxxxxxxxxxxxxxx
Cc: intel-gvt-dev@xxxxxxxxxxxxxxxxxxxxx, zhenyuw@xxxxxxxxxxxxxxx, colin.xu@xxxxxxxxx
Message-ID: <71b10da4af9e8be3b38b99382e164dd4e83fdf27.1615946755.git.colin.xu@xxxxxxxxx>
From: Colin Xu <colin.xu@xxxxxxxxx>
commit 92010a97098c4c9fd777408cc98064d26b32695b upstream
- Remove dup mmio handler for BXT/APL. Otherwise mmio handler will fail
to init.
- Add engine GPR with F_CMD_ACCESS since BXT/APL will load them via
LRI. Otherwise, guest will enter failsafe mode.
V2:
Use RCS/BCS GPR macros instead of offset.
Revise commit message.
V3:
Use GEN8_RING_CS_GPR macros on ring base.
Reviewed-by: Zhenyu Wang <zhenyuw@xxxxxxxxxxxxxxx>
Signed-off-by: Colin Xu <colin.xu@xxxxxxxxx>
Signed-off-by: Zhenyu Wang <zhenyuw@xxxxxxxxxxxxxxx>
Link: http://patchwork.freedesktop.org/patch/msgid/20201016052913.209248-1-colin.xu@xxxxxxxxx
(cherry picked from commit 92010a97098c4c9fd777408cc98064d26b32695b)
Signed-off-by: Colin Xu <colin.xu@xxxxxxxxx>
Cc: <stable@xxxxxxxxxxxxxxx> # 5.4.y
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/gvt/handlers.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -3132,7 +3132,7 @@ static int init_skl_mmio_info(struct int
NULL, NULL);
MMIO_D(GAMT_CHKN_BIT_REG, D_KBL | D_CFL);
- MMIO_D(GEN9_CTX_PREEMPT_REG, D_SKL_PLUS);
+ MMIO_D(GEN9_CTX_PREEMPT_REG, D_SKL_PLUS & ~D_BXT);
return 0;
}
@@ -3306,6 +3306,12 @@ static int init_bxt_mmio_info(struct int
MMIO_D(GEN8_PUSHBUS_SHIFT, D_BXT);
MMIO_D(GEN6_GFXPAUSE, D_BXT);
MMIO_DFH(GEN8_L3SQCREG1, D_BXT, F_CMD_ACCESS, NULL, NULL);
+ MMIO_DFH(GEN8_L3CNTLREG, D_BXT, F_CMD_ACCESS, NULL, NULL);
+ MMIO_DFH(_MMIO(0x20D8), D_BXT, F_CMD_ACCESS, NULL, NULL);
+ MMIO_F(HSW_CS_GPR(0), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
+ MMIO_F(_MMIO(0x12600), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
+ MMIO_F(BCS_GPR(0), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
+ MMIO_F(_MMIO(0x1a600), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
MMIO_DFH(GEN9_CTX_PREEMPT_REG, D_BXT, F_CMD_ACCESS, NULL, NULL);
Patches currently in stable-queue which might be from colin.xu@xxxxxxxxx are
queue-5.4/drm-i915-gvt-set-snoop-for-pat3-on-bxt-apl-to-workaround-gpu-bb-hang.patch
queue-5.4/drm-i915-gvt-fix-virtual-display-setup-for-bxt-apl.patch
queue-5.4/drm-i915-gvt-fix-vfio_edid-issue-for-bxt-apl.patch
queue-5.4/drm-i915-gvt-fix-port-number-for-bdw-on-edid-region-setup.patch
queue-5.4/drm-i915-gvt-fix-mmio-handler-break-on-bxt-apl.patch
