This is a note to let you know that I've just added the patch titled arm64: Unconditionally set virtual cpu id registers to the 4.14-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: arm64-unconditionally-set-virtual-cpu-id-registers.patch and it can be found in the queue-4.14 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From vladimir.murzin@xxxxxxx Fri Mar 19 10:43:20 2021 From: Vladimir Murzin <vladimir.murzin@xxxxxxx> Date: Tue, 16 Mar 2021 13:43:19 +0000 Subject: arm64: Unconditionally set virtual cpu id registers To: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, stable@xxxxxxxxxxxxxxx Cc: catalin.marinas@xxxxxxx, will@xxxxxxxxxx, maz@xxxxxxxxxx, dbrazdil@xxxxxxxxxx Message-ID: <20210316134319.89472-1-vladimir.murzin@xxxxxxx> From: Vladimir Murzin <vladimir.murzin@xxxxxxx> Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") reorganized el2 setup in such way that virtual cpu id registers set only in nVHE, yet they used (and need) to be set irrespective VHE support. Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") Signed-off-by: Vladimir Murzin <vladimir.murzin@xxxxxxx> Acked-by: Will Deacon <will@xxxxxxxxxx> Reviewed-by: Marc Zyngier <maz@xxxxxxxxxx> --- Changelog v1 -> v2 - Drop the reference to 32bit guests from commit message (per Marc) There is no upstream fix since issue went away due to code there has been reworked in 5.12: nVHE comes first, so virtual cpu id register are always set. Maintainers, please, Ack. arch/arm64/include/asm/el2_setup.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index f988e94cdf9e..db87daca6b8c 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -113,7 +113,7 @@ .endm /* Virtual CPU ID registers */ -.macro __init_el2_nvhe_idregs +.macro __init_el2_idregs mrs x0, midr_el1 mrs x1, mpidr_el1 msr vpidr_el2, x0 @@ -165,6 +165,7 @@ __init_el2_stage2 __init_el2_gicv3 __init_el2_hstr + __init_el2_idregs /* * When VHE is not in use, early init of EL2 needs to be done here. @@ -173,7 +174,6 @@ * will be done via the _EL1 system register aliases in __cpu_setup. */ .ifeqs "\mode", "nvhe" - __init_el2_nvhe_idregs __init_el2_nvhe_cptr __init_el2_nvhe_sve __init_el2_nvhe_prepare_eret -- 2.24.0 Patches currently in stable-queue which might be from vladimir.murzin@xxxxxxx are queue-4.14/arm64-unconditionally-set-virtual-cpu-id-registers.patch