Patch "drm/msm: Fix races managing the OOB state for timestamp vs timestamps." has been added to the 5.10-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/msm: Fix races managing the OOB state for timestamp vs timestamps.

to the 5.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-msm-fix-races-managing-the-oob-state-for-timesta.patch
and it can be found in the queue-5.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 7616e13a6cba1bf0c980194380d472e1c6ca969f
Author: Eric Anholt <eric@xxxxxxxxxx>
Date:   Thu Jan 28 13:03:31 2021 -0800

    drm/msm: Fix races managing the OOB state for timestamp vs timestamps.
    
    [ Upstream commit 5f98b33b04c02c0d9088c7486c59d058696782f9 ]
    
    Now that we're not racing with GPU setup, also fix races of timestamps
    against other timestamps.  In freedreno CI, we were seeing this path trigger
    timeouts on setting the GMU bit, producing:
    
    [drm:_a6xx_gmu_set_oob] *ERROR* Timeout waiting for GMU OOB set GPU_SET: 0x0
    
    and this triggered especially on the first set of tests right after
    boot (it's probably easier to lose the race than one might think,
    given that we start many tests in parallel, and waiting for NFS to
    page in code probably means that lots of tests hit the same point of
    screen init at the same time).  As of this patch, the message seems to
    have completely gone away.
    
    Signed-off-by: Eric Anholt <eric@xxxxxxxxxx>
    Fixes: 4b565ca5a2cb ("drm/msm: Add A6XX device support")
    Reviewed-by: Jordan Crouse <jcrouse@xxxxxxxxxxxxxx>
    Signed-off-by: Rob Clark <robdclark@xxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 9fda02550d80d..83b50f6d6bb78 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1066,6 +1066,9 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
 {
 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
 	struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
+	static DEFINE_MUTEX(perfcounter_oob);
+
+	mutex_lock(&perfcounter_oob);
 
 	/* Force the GPU power on so we can read this register */
 	a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET);
@@ -1074,6 +1077,7 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
 		REG_A6XX_RBBM_PERFCTR_CP_0_HI);
 
 	a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET);
+	mutex_unlock(&perfcounter_oob);
 	return 0;
 }
 



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