Patch "ARM: dts: meson8: remove two invalid interrupt lines from the GPU node" has been added to the 5.8-stable tree

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This is a note to let you know that I've just added the patch titled

    ARM: dts: meson8: remove two invalid interrupt lines from the GPU node

to the 5.8-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm-dts-meson8-remove-two-invalid-interrupt-lines-fr.patch
and it can be found in the queue-5.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 07df301a08a27b22d10b679bbdec1d93f3361616
Author: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
Date:   Sat Aug 15 20:19:57 2020 +0200

    ARM: dts: meson8: remove two invalid interrupt lines from the GPU node
    
    [ Upstream commit 737e7610b545cc901a9696083c1824a7104b8d1b ]
    
    The 3.10 vendor kernel defines the following GPU 20 interrupt lines:
      #define INT_MALI_GP                 AM_IRQ(160)
      #define INT_MALI_GP_MMU             AM_IRQ(161)
      #define INT_MALI_PP                 AM_IRQ(162)
      #define INT_MALI_PMU                AM_IRQ(163)
      #define INT_MALI_PP0                AM_IRQ(164)
      #define INT_MALI_PP0_MMU            AM_IRQ(165)
      #define INT_MALI_PP1                AM_IRQ(166)
      #define INT_MALI_PP1_MMU            AM_IRQ(167)
      #define INT_MALI_PP2                AM_IRQ(168)
      #define INT_MALI_PP2_MMU            AM_IRQ(169)
      #define INT_MALI_PP3                AM_IRQ(170)
      #define INT_MALI_PP3_MMU            AM_IRQ(171)
      #define INT_MALI_PP4                AM_IRQ(172)
      #define INT_MALI_PP4_MMU            AM_IRQ(173)
      #define INT_MALI_PP5                AM_IRQ(174)
      #define INT_MALI_PP5_MMU            AM_IRQ(175)
      #define INT_MALI_PP6                AM_IRQ(176)
      #define INT_MALI_PP6_MMU            AM_IRQ(177)
      #define INT_MALI_PP7                AM_IRQ(178)
      #define INT_MALI_PP7_MMU            AM_IRQ(179)
    
    However, the driver from the 3.10 vendor kernel does not use the
    following four interrupt lines:
    - INT_MALI_PP3
    - INT_MALI_PP3_MMU
    - INT_MALI_PP7
    - INT_MALI_PP7_MMU
    
    Drop the "pp3" and "ppmmu3" interrupt lines. This is also important
    because there is no matching entry in interrupt-names for it (meaning
    the "pp2" interrupt is actually assigned to the "pp3" interrupt line).
    
    Fixes: 7d3f6b536e72c9 ("ARM: dts: meson8: add the Mali-450 MP6 GPU")
    Reported-by: Thomas Graichen <thomas.graichen@xxxxxxxxx>
    Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
    Signed-off-by: Kevin Hilman <khilman@xxxxxxxxxxxx>
    Tested-by: thomas graichen <thomas.graichen@xxxxxxxxx>
    Reviewed-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20200815181957.408649-1-martin.blumenstingl@xxxxxxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index eedb92526968a..a4ab8b96d0eb6 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -239,8 +239,6 @@ mali: gpu@c0000 {
 				     <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,



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