Patch "powerpc/watchpoint: Fix quadword instruction handling on p10 predecessors" has been added to the 5.8-stable tree

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This is a note to let you know that I've just added the patch titled

    powerpc/watchpoint: Fix quadword instruction handling on p10 predecessors

to the 5.8-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     powerpc-watchpoint-fix-quadword-instruction-handling.patch
and it can be found in the queue-5.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit e896e6ea4b0323a1ebb95e8e4361c01fc456d272
Author: Ravi Bangoria <ravi.bangoria@xxxxxxxxxxxxx>
Date:   Wed Sep 2 09:59:38 2020 +0530

    powerpc/watchpoint: Fix quadword instruction handling on p10 predecessors
    
    [ Upstream commit 4759c11ed20454b7b36db4ec15f7d5aa1519af4a ]
    
    On p10 predecessors, watchpoint with quadword access is compared at
    quadword length. If the watch range is doubleword or less than that
    in a first half of quadword aligned 16 bytes, and if there is any
    unaligned quadword access which will access only the 2nd half, the
    handler should consider it as extraneous and emulate/single-step it
    before continuing.
    
    Fixes: 74c6881019b7 ("powerpc/watchpoint: Prepare handler to handle more than one watchpoint")
    Reported-by: Pedro Miraglia Franco de Carvalho <pedromfc@xxxxxxxxxxxxx>
    Signed-off-by: Ravi Bangoria <ravi.bangoria@xxxxxxxxxxxxx>
    Signed-off-by: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20200902042945.129369-2-ravi.bangoria@xxxxxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/powerpc/include/asm/hw_breakpoint.h b/arch/powerpc/include/asm/hw_breakpoint.h
index cb424799da0dc..5a00da670a407 100644
--- a/arch/powerpc/include/asm/hw_breakpoint.h
+++ b/arch/powerpc/include/asm/hw_breakpoint.h
@@ -40,6 +40,7 @@ struct arch_hw_breakpoint {
 #else
 #define HW_BREAKPOINT_SIZE  0x8
 #endif
+#define HW_BREAKPOINT_SIZE_QUADWORD	0x10
 
 #define DABR_MAX_LEN	8
 #define DAWR_MAX_LEN	512
diff --git a/arch/powerpc/kernel/hw_breakpoint.c b/arch/powerpc/kernel/hw_breakpoint.c
index c55e67bab2710..f39e86d751144 100644
--- a/arch/powerpc/kernel/hw_breakpoint.c
+++ b/arch/powerpc/kernel/hw_breakpoint.c
@@ -519,9 +519,17 @@ static bool ea_hw_range_overlaps(unsigned long ea, int size,
 				 struct arch_hw_breakpoint *info)
 {
 	unsigned long hw_start_addr, hw_end_addr;
+	unsigned long align_size = HW_BREAKPOINT_SIZE;
 
-	hw_start_addr = ALIGN_DOWN(info->address, HW_BREAKPOINT_SIZE);
-	hw_end_addr = ALIGN(info->address + info->len, HW_BREAKPOINT_SIZE);
+	/*
+	 * On p10 predecessors, quadword is handle differently then
+	 * other instructions.
+	 */
+	if (!cpu_has_feature(CPU_FTR_ARCH_31) && size == 16)
+		align_size = HW_BREAKPOINT_SIZE_QUADWORD;
+
+	hw_start_addr = ALIGN_DOWN(info->address, align_size);
+	hw_end_addr = ALIGN(info->address + info->len, align_size);
 
 	return ((ea < hw_end_addr) && (ea + size > hw_start_addr));
 }



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