Patch "coresight: etm4x: Fix save and restore of TRCVMIDCCTLR1 register" has been added to the 5.8-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    coresight: etm4x: Fix save and restore of TRCVMIDCCTLR1 register

to the 5.8-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     coresight-etm4x-fix-save-and-restore-of-trcvmidcctlr.patch
and it can be found in the queue-5.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 1cfa6c6d962a21d280e4b3b8172082b58a8b1a02
Author: Sai Prakash Ranjan <saiprakash.ranjan@xxxxxxxxxxxxxx>
Date:   Mon Sep 28 10:35:13 2020 -0600

    coresight: etm4x: Fix save and restore of TRCVMIDCCTLR1 register
    
    [ Upstream commit 3477326277451000bc667dfcc4fd0774c039184c ]
    
    In commit f188b5e76aae ("coresight: etm4x: Save/restore state
    across CPU low power states"), mistakenly TRCVMIDCCTLR1 register
    value was saved in trcvmidcctlr0 state variable which is used to
    store TRCVMIDCCTLR0 register value in etm4x_cpu_save() and then
    same value is written back to both TRCVMIDCCTLR0 and TRCVMIDCCTLR1
    in etm4x_cpu_restore(). There is already a trcvmidcctlr1 state
    variable available for TRCVMIDCCTLR1, so use it.
    
    Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states")
    Reviewed-by: Suzuki K Poulose <suzuki.poulose@xxxxxxx>
    Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@xxxxxxxxxxxxxx>
    Signed-off-by: Mathieu Poirier <mathieu.poirier@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20200928163513.70169-26-mathieu.poirier@xxxxxxxxxx
    Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index d6395aeffd99d..d4e74b03c1e0f 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -1233,7 +1233,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
 	state->trccidcctlr1 = readl(drvdata->base + TRCCIDCCTLR1);
 
 	state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR0);
-	state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR1);
+	state->trcvmidcctlr1 = readl(drvdata->base + TRCVMIDCCTLR1);
 
 	state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR);
 
@@ -1343,7 +1343,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata)
 	writel_relaxed(state->trccidcctlr1, drvdata->base + TRCCIDCCTLR1);
 
 	writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR0);
-	writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR1);
+	writel_relaxed(state->trcvmidcctlr1, drvdata->base + TRCVMIDCCTLR1);
 
 	writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET);