Patch "drm/amd/display: Do not double-buffer DTO adjustments" has been added to the 5.4-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/amd/display: Do not double-buffer DTO adjustments

to the 5.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-amd-display-do-not-double-buffer-dto-adjustments.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit f8e382fa396ccba1eab3019d2bbbcefb263aab62
Author: Wesley Chalmers <Wesley.Chalmers@xxxxxxx>
Date:   Mon Sep 16 15:42:38 2019 -0500

    drm/amd/display: Do not double-buffer DTO adjustments
    
    [ Upstream commit 6bd0a112ec129615d23aa5d8d3dd0be0243989aa ]
    
    [WHY]
    When changing DPP global ref clock, DTO adjustments must take effect
    immediately, or else underflow may occur.
    It appears the original decision to double-buffer DTO adjustments was made to
    prevent underflows that occur when raising DPP ref clock (which is not
    double-buffered), but that same decision causes similar issues when
    lowering DPP global ref clock. The better solution is to order the
    adjustments according to whether clocks are being raised or lowered.
    
    Signed-off-by: Wesley Chalmers <Wesley.Chalmers@xxxxxxx>
    Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@xxxxxxx>
    Acked-by: Anthony Koo <Anthony.Koo@xxxxxxx>
    Acked-by: Leo Li <sunpeng.li@xxxxxxx>
    Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c
index 16476ed255363..2064366322755 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c
@@ -119,32 +119,6 @@ void dccg2_get_dccg_ref_freq(struct dccg *dccg,
 
 void dccg2_init(struct dccg *dccg)
 {
-	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
-
-	// Fallthrough intentional to program all available dpp_dto's
-	switch (dccg_dcn->base.ctx->dc->res_pool->pipe_count) {
-	case 6:
-		REG_UPDATE(DPPCLK_DTO_CTRL, DPPCLK_DTO_DB_EN[5], 1);
-		/* Fall through */
-	case 5:
-		REG_UPDATE(DPPCLK_DTO_CTRL, DPPCLK_DTO_DB_EN[4], 1);
-		/* Fall through */
-	case 4:
-		REG_UPDATE(DPPCLK_DTO_CTRL, DPPCLK_DTO_DB_EN[3], 1);
-		/* Fall through */
-	case 3:
-		REG_UPDATE(DPPCLK_DTO_CTRL, DPPCLK_DTO_DB_EN[2], 1);
-		/* Fall through */
-	case 2:
-		REG_UPDATE(DPPCLK_DTO_CTRL, DPPCLK_DTO_DB_EN[1], 1);
-		/* Fall through */
-	case 1:
-		REG_UPDATE(DPPCLK_DTO_CTRL, DPPCLK_DTO_DB_EN[0], 1);
-		break;
-	default:
-		ASSERT(false);
-		break;
-	}
 }
 
 static const struct dccg_funcs dccg2_funcs = {



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