Patch "drm/i915: Use proper fault mask in interrupt postinstall too" has been added to the 5.6-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/i915: Use proper fault mask in interrupt postinstall too

to the 5.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-i915-use-proper-fault-mask-in-interrupt-postinst.patch
and it can be found in the queue-5.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit e6cd9825e99c85064c1393c8c484b1318c11ff43
Author: Matt Roper <matthew.d.roper@xxxxxxxxx>
Date:   Fri Apr 24 16:14:23 2020 -0700

    drm/i915: Use proper fault mask in interrupt postinstall too
    
    commit 8598eb781cf68fd6cb67c479f1479ae58bd54fb9 upstream.
    
    The IRQ postinstall handling had open-coded pipe fault mask selection
    that never got updated for gen11.  Switch it to use
    gen8_de_pipe_fault_mask() to ensure we don't miss updates for new
    platforms.
    
    Cc: José Roberto de Souza <jose.souza@xxxxxxxxx>
    Fixes: d506a65d56fd ("drm/i915: Catch GTT fault errors for gen11+ planes")
    Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
    Link: https://patchwork.freedesktop.org/patch/msgid/20200424231423.4065231-1-matthew.d.roper@xxxxxxxxx
    Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
    (cherry picked from commit 869129ee0c624a78c74e50b51635e183196cd2c6)
    Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
    Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index afc6aad9bf8c5..c6f02b0b6c7aa 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3321,7 +3321,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
 {
 	struct intel_uncore *uncore = &dev_priv->uncore;
 
-	u32 de_pipe_masked = GEN8_PIPE_CDCLK_CRC_DONE;
+	u32 de_pipe_masked = gen8_de_pipe_fault_mask(dev_priv) |
+		GEN8_PIPE_CDCLK_CRC_DONE;
 	u32 de_pipe_enables;
 	u32 de_port_masked = GEN8_AUX_CHANNEL_A;
 	u32 de_port_enables;
@@ -3332,13 +3333,10 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
 		de_misc_masked |= GEN8_DE_MISC_GSE;
 
 	if (INTEL_GEN(dev_priv) >= 9) {
-		de_pipe_masked |= GEN9_DE_PIPE_IRQ_FAULT_ERRORS;
 		de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
 				  GEN9_AUX_CHANNEL_D;
 		if (IS_GEN9_LP(dev_priv))
 			de_port_masked |= BXT_DE_PORT_GMBUS;
-	} else {
-		de_pipe_masked |= GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
 	}
 
 	if (INTEL_GEN(dev_priv) >= 11)



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