This is a note to let you know that I've just added the patch titled ARM: dts: imx6ul: use nvmem-cells for cpu speed grading to the 4.19-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: arm-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch and it can be found in the queue-4.19 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From 92f0eb08c66a73594cf200e65689e767f7f0da5e Mon Sep 17 00:00:00 2001 From: Anson Huang <Anson.Huang@xxxxxxx> Date: Fri, 14 Sep 2018 10:59:21 +0800 Subject: ARM: dts: imx6ul: use nvmem-cells for cpu speed grading From: Anson Huang <Anson.Huang@xxxxxxx> commit 92f0eb08c66a73594cf200e65689e767f7f0da5e upstream. On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock needs to be enabled first, so use the nvmem-cells binding instead. Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx> Signed-off-by: Shawn Guo <shawnguo@xxxxxxxxxx> Cc: Sébastien Szymanski <sebastien.szymanski@xxxxxxxxxxxx> Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/arm/boot/dts/imx6ul.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -87,6 +87,8 @@ "pll1_sys"; arm-supply = <®_arm>; soc-supply = <®_soc>; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; }; @@ -930,6 +932,10 @@ tempmon_temp_grade: temp-grade@20 { reg = <0x20 4>; }; + + cpu_speed_grade: speed-grade@10 { + reg = <0x10 4>; + }; }; lcdif: lcdif@21c8000 { Patches currently in stable-queue which might be from Anson.Huang@xxxxxxx are queue-4.19/arm-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch queue-4.19/cpufreq-imx6q-read-ocotp-through-nvmem-for-imx6ul-imx6ull.patch