This is a note to let you know that I've just added the patch titled PCI: Apply Cavium ACS quirk to ThunderX2 and ThunderX3 to the 5.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: pci-apply-cavium-acs-quirk-to-thunderx2-and-thunderx3.patch and it can be found in the queue-5.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From f338bb9f0179cb959977b74e8331b312264d720b Mon Sep 17 00:00:00 2001 From: George Cherian <george.cherian@xxxxxxxxxxx> Date: Mon, 11 Nov 2019 02:43:03 +0000 Subject: PCI: Apply Cavium ACS quirk to ThunderX2 and ThunderX3 From: George Cherian <george.cherian@xxxxxxxxxxx> commit f338bb9f0179cb959977b74e8331b312264d720b upstream. Enhance the ACS quirk for Cavium Processors. Add the root port vendor IDs for ThunderX2 and ThunderX3 series of processors. [bhelgaas: add Fixes: and stable tag] Fixes: f2ddaf8dfd4a ("PCI: Apply Cavium ThunderX ACS quirk to more Root Ports") Link: https://lore.kernel.org/r/20191111024243.GA11408@xxxxxxxxxxxxxxxxxxxxxxxx Signed-off-by: George Cherian <george.cherian@xxxxxxxxxxx> Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx> Reviewed-by: Robert Richter <rrichter@xxxxxxxxxxx> Cc: stable@xxxxxxxxxxxxxxx # v4.12+ Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- drivers/pci/quirks.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4313,15 +4313,21 @@ static int pci_quirk_amd_sb_acs(struct p static bool pci_quirk_cavium_acs_match(struct pci_dev *dev) { + if (!pci_is_pcie(dev) || pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) + return false; + + switch (dev->device) { /* - * Effectively selects all downstream ports for whole ThunderX 1 - * family by 0xf800 mask (which represents 8 SoCs), while the lower - * bits of device ID are used to indicate which subdevice is used - * within the SoC. + * Effectively selects all downstream ports for whole ThunderX1 + * (which represents 8 SoCs). */ - return (pci_is_pcie(dev) && - (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) && - ((dev->device & 0xf800) == 0xa000)); + case 0xa000 ... 0xa7ff: /* ThunderX1 */ + case 0xaf84: /* ThunderX2 */ + case 0xb884: /* ThunderX3 */ + return true; + default: + return false; + } } static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags) Patches currently in stable-queue which might be from george.cherian@xxxxxxxxxxx are queue-5.4/pci-apply-cavium-acs-quirk-to-thunderx2-and-thunderx3.patch