> On Thu 2022-03-24 22:14:05, Lecopzer Chen wrote: > > With the recent feature added to enable perf events to use pseudo NMIs > > as interrupts on platforms which support GICv3 or later, its now been > > possible to enable hard lockup detector (or NMI watchdog) on arm64 > > platforms. So enable corresponding support. > > > > One thing to note here is that normally lockup detector is initialized > > just after the early initcalls but PMU on arm64 comes up much later as > > device_initcall(). To cope with that, overriding watchdog_nmi_probe() to > > let the watchdog framework know PMU not ready, and inform the framework > > to re-initialize lockup detection once PMU has been initialized. > > > > [1]: http://lore.kernel.org/linux-arm-kernel/1610712101-14929-1-git-send-email-sumit.garg@xxxxxxxxxx > > > > --- /dev/null > > +++ b/arch/arm64/kernel/watchdog_hld.c > > @@ -0,0 +1,37 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +#include <linux/nmi.h> > > +#include <linux/cpufreq.h> > > +#include <linux/perf/arm_pmu.h> > > + > > +/* > > + * Safe maximum CPU frequency in case a particular platform doesn't implement > > + * cpufreq driver. Although, architecture doesn't put any restrictions on > > + * maximum frequency but 5 GHz seems to be safe maximum given the available > > + * Arm CPUs in the market which are clocked much less than 5 GHz. On the other > > + * hand, we can't make it much higher as it would lead to a large hard-lockup > > + * detection timeout on parts which are running slower (eg. 1GHz on > > + * Developerbox) and doesn't possess a cpufreq driver. > > + */ > > +#define SAFE_MAX_CPU_FREQ 5000000000UL // 5 GHz > > +u64 hw_nmi_get_sample_period(int watchdog_thresh) > > +{ > > + unsigned int cpu = smp_processor_id(); > > + unsigned long max_cpu_freq; > > + > > + max_cpu_freq = cpufreq_get_hw_max_freq(cpu) * 1000UL; > > + if (!max_cpu_freq) > > + max_cpu_freq = SAFE_MAX_CPU_FREQ; > > + > > + return (u64)max_cpu_freq * watchdog_thresh; > > +} > > This change is not mentioned in the commit message. > Please, put it into a separate patch. Actully, This cames from [1]: http://lore.kernel.org/linux-arm-kernel/1610712101-14929-1-git-send-email-sumit.garg@xxxxxxxxxx And I didn't touch the commit message from the origin patch. But of course, I could imporve it with proper description if anyone thinks it's not good enough. Would you mean put this function hw_nmi_get_sample_period() in patch 6th? In the view of "arm64 uses delayed init with all the functionality it need to set up", IMO, this make sense for me to put into a single patch. But if you still think this should put into a separate patch, I'll do it:) > > > +int __init watchdog_nmi_probe(void) > > +{ > > + if (!allow_lockup_detector_init_retry) > > + return -EBUSY; > > How do you know that you should return -EBUSY > when retry in not enabled? > > I guess that it is an optimization to make it fast > during the first call. But the logic is far from > obvious. > Yes, you can see this as an optimization, because arm64 PMU is not ready during lockup_detector_init(), so the watchdog_nmi_probe() must fail. Thus we only want to do watchdog_nmi_probe() in delayed init, so if not in the state (allow_lockup_detector_init_retry=true), just tell if it's unclear, maybe a brief comment can be add like this: + /* arm64 is only able to initialize lockup detecor during delayed init */ + if (!allow_lockup_detector_init_retry) + return -EBUSY; > > + > > + if (!arm_pmu_irq_is_nmi()) > > + return -ENODEV; > > + > > + return hardlockup_detector_perf_init(); > > +} > > Is this just an optimization or is it really needed? > Why this was not needed in v2 patchset? > > If it is just an optimization then I would remove it. > IMHO, it just adds confusion and it is not worth it. > It was a mistake when I rebased v2, This should be included in v2 but I missed it. For arm_pmu_irq_is_nmi() checking, we do need it, becasue arm64 needs explictly turns on Pseudo-NMI to support base function for NMI. hardlockup_detector_perf_init() will success even if we haven't had Pseudo-NMI turns on, however, the pmu interrupts will act like a normal interrupt instead of NMI and the hardlockup detector would be broken. thanks for all the comment BRs, Lecopzer
