In order to detect hardlockups, it is necessary to have the ability to
receive interrupts even when disabled: a non-maskable interrupt is
required. Add the flag IRQF_DELIVER_AS_NMI to the arguments of
request_irq() for this purpose.
Note that the timer, when programmed to deliver interrupts via the IO APIC
is programmed as level-triggered. This is to have an indication that the
NMI comes from HPET timer as indicated in the General Status Interrupt
Register. However, NMIs are always edge-triggered, thus a GSI edge-
triggered interrupt is now requested.
An NMI handler is also implemented. The handler looks for hardlockups and
kicks the timer.
Cc: Ashok Raj <ashok.raj@xxxxxxxxx>
Cc: Andi Kleen <andi.kleen@xxxxxxxxx>
Cc: Tony Luck <tony.luck@xxxxxxxxx>
Cc: Borislav Petkov <bp@xxxxxxx>
Cc: Jacob Pan <jacob.jun.pan@xxxxxxxxx>
Cc: "Rafael J. Wysocki" <rafael.j.wysocki@xxxxxxxxx>
Cc: Don Zickus <dzickus@xxxxxxxxxx>
Cc: Nicholas Piggin <npiggin@xxxxxxxxx>
Cc: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
Cc: Frederic Weisbecker <frederic@xxxxxxxxxx>
Cc: Alexei Starovoitov <ast@xxxxxxxxxx>
Cc: Babu Moger <babu.moger@xxxxxxxxxx>
Cc: Mathieu Desnoyers <mathieu.desnoyers@xxxxxxxxxxxx>
Cc: Masami Hiramatsu <mhiramat@xxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Cc: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
Cc: Philippe Ombredanne <pombredanne@xxxxxxxx>
Cc: Colin Ian King <colin.king@xxxxxxxxxxxxx>
Cc: Byungchul Park <byungchul.park@xxxxxxx>
Cc: "Paul E. McKenney" <paulmck@xxxxxxxxxxxxxxxxxx>
Cc: "Luis R. Rodriguez" <mcgrof@xxxxxxxxxx>
Cc: Waiman Long <longman@xxxxxxxxxx>
Cc: Josh Poimboeuf <jpoimboe@xxxxxxxxxx>
Cc: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>
Cc: Davidlohr Bueso <dave@xxxxxxxxxxxx>
Cc: Christoffer Dall <cdall@xxxxxxxxxx>
Cc: Marc Zyngier <marc.zyngier@xxxxxxx>
Cc: Kai-Heng Feng <kai.heng.feng@xxxxxxxxxxxxx>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>
Cc: David Rientjes <rientjes@xxxxxxxxxx>
Cc: "Ravi V. Shankar" <ravi.v.shankar@xxxxxxxxx>
Cc: x86@xxxxxxxxxx
Cc: iommu@xxxxxxxxxxxxxxxxxxxxxxxxxx
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@xxxxxxxxxxxxxxx>
---
arch/x86/kernel/hpet.c | 2 +-
kernel/watchdog_hld_hpet.c | 55 +++++++++++++++++++++++++++++++++++++++++++++-
2 files changed, 55 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index fda6e19..5ca1953 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -205,7 +205,7 @@ int hpet_hardlockup_detector_assign_legacy_irq(struct hpet_hld_data *hdata)
break;
}
- gsi = acpi_register_gsi(NULL, hwirq, ACPI_LEVEL_SENSITIVE,
+ gsi = acpi_register_gsi(NULL, hwirq, ACPI_EDGE_SENSITIVE,
ACPI_ACTIVE_LOW);
if (gsi > 0)
break;
diff --git a/kernel/watchdog_hld_hpet.c b/kernel/watchdog_hld_hpet.c
index 8fa4e55..3bedffa 100644
--- a/kernel/watchdog_hld_hpet.c
+++ b/kernel/watchdog_hld_hpet.c
@@ -10,6 +10,7 @@
#include <linux/nmi.h>
#include <linux/hpet.h>
#include <asm/hpet.h>
+#include <asm/irq_remapping.h>
#undef pr_fmt
#define pr_fmt(fmt) "NMI hpet watchdog: " fmt
@@ -183,6 +184,8 @@ static irqreturn_t hardlockup_detector_irq_handler(int irq, void *data)
if (!(hdata->flags & HPET_DEV_PERI_CAP))
kick_timer(hdata);
+ pr_err("This interrupt should not have happened. Ensure delivery mode is NMI.\n");
+
/* Acknowledge interrupt if in level-triggered mode */
if (!use_fsb)
hpet_writel(BIT(hdata->num), HPET_STATUS);
@@ -191,6 +194,47 @@ static irqreturn_t hardlockup_detector_irq_handler(int irq, void *data)
}
/**
+ * hardlockup_detector_nmi_handler() - NMI Interrupt handler
+ * @val: Attribute associated with the NMI. Not used.
+ * @regs: Register values as seen when the NMI was asserted
+ *
+ * When an NMI is issued, look for hardlockups. If the timer is not periodic,
+ * kick it. The interrupt is always handled when if delivered via the
+ * Front-Side Bus.
+ *
+ * Returns:
+ *
+ * NMI_DONE if the HPET timer did not cause the interrupt. NMI_HANDLED
+ * otherwise.
+ */
+static int hardlockup_detector_nmi_handler(unsigned int val,
+ struct pt_regs *regs)
+{
+ struct hpet_hld_data *hdata = hld_data;
+ unsigned int use_fsb;
+
+ /*
+ * If FSB delivery mode is used, the timer interrupt is programmed as
+ * edge-triggered and there is no need to check the ISR register.
+ */
+ use_fsb = hdata->flags & HPET_DEV_FSB_CAP;
+
+ if (!use_fsb && !is_hpet_wdt_interrupt(hdata))
+ return NMI_DONE;
+
+ inspect_for_hardlockups(regs);
+
+ if (!(hdata->flags & HPET_DEV_PERI_CAP))
+ kick_timer(hdata);
+
+ /* Acknowledge interrupt if in level-triggered mode */
+ if (!use_fsb)
+ hpet_writel(BIT(hdata->num), HPET_STATUS);
+
+ return NMI_HANDLED;
+}
+
+/**
* setup_irq_msi_mode() - Configure the timer to deliver an MSI interrupt
* @data: Data associated with the instance of the HPET timer to configure
*
@@ -282,11 +326,20 @@ static int setup_hpet_irq(struct hpet_hld_data *hdata)
if (ret)
return ret;
+ /* Register the NMI handler, which will be the actual handler we use. */
+ ret = register_nmi_handler(NMI_LOCAL, hardlockup_detector_nmi_handler,
+ 0, "hpet_hld");
+ if (ret)
+ return ret;
+
/*
* Request an interrupt to activate the irq in all the needed domains.
*/
ret = request_irq(hwirq, hardlockup_detector_irq_handler,
- IRQF_TIMER, "hpet_hld", hdata);
+ IRQF_TIMER | IRQF_DELIVER_AS_NMI,
+ "hpet_hld", hdata);
+ if (ret)
+ unregister_nmi_handler(NMI_LOCAL, "hpet_hld");
return ret;
}
--
2.7.4
--
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