Re: [PATCH v2] sparc64: Handle additional cases of no fault loads

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On Fri, Sep 08, 2017 at 04:34:21PM -0600, Rob Gardner wrote:
> Load instructions using ASI_PNF or other no-fault ASIs should not
> cause a SIGSEGV or SIGBUS.
> 
> A garden variety unmapped address follows the TSB miss path, and when
> no valid mapping is found in the process page tables, the miss handler
> checks to see if the access was via a no-fault ASI.  It then fixes up
> the target register with a zero, and skips the no-fault load
> instruction.
> 
> But different paths are taken for data access exceptions and alignment
> traps, and these do not respect the no-fault ASI. We add checks in
> these paths for the no-fault ASI, and fix up the target register and
> TPC just like in the TSB miss case.
> 
> Signed-off-by: Rob Gardner <rob.gardner@xxxxxxxxxx>
Looks much better!
Acked-by: Sam Ravnborg <sam@xxxxxxxxxxxx>
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