On 06/23/2016 09:42 PM, chase rayfield wrote: > Just to clarify, unlike variable length ISAs Sparc has fixed 32bit and > 64bit ISAs... Sparc v8+ is 32bits for every instruction executed while > for Sparc v9 it is 64bits for every instruction. Thus the overhead is > not just in pointers etc.. as is often the case on variable length > architectures. 64bit instructions potentially waste more cache as well > as use 2x the memory bandwidth. Also note that Sparc does not mix > 32bit and 64bit instructions I presume that when a 64bit kernel is > executing 32bit code it switches back out of 64bit mode when returning > to userland... Then please go to Oracle and tell them they are all wrong with what they are doing. Because it seems you know more about this stuff than the people who are engineering the actual hardware. Adrian -- .''`. John Paul Adrian Glaubitz : :' : Debian Developer - glaubitz@xxxxxxxxxx `. `' Freie Universitaet Berlin - glaubitz@xxxxxxxxxxxxxxxxxxx `- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913 -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
