From: Bob Picco <bpicco@xxxxxxxxxx> Date: Tue, 16 Sep 2014 10:09:06 -0400 > From: bob picco <bpicco@xxxxxxxxxx> > > The T5 (niagara5) has different PCR related HV fast trap values and a new > HV API Group. This patch utilizes these and shares when possible with niagara4. > > We use the same sparc_pmu niagara4_pmu. Should there be new effort to > obtain the MCU perf statistics then this would have to be changed. > > Cc: sparclinux@xxxxxxxxxxxxxxx > Signed-off-by: Bob Picco <bob.picco@xxxxxxxxxx> > --- > V2: Hopefully have the programming style correct. Looks good, applied, although: > @@ -215,6 +244,9 @@ static int __init register_perf_hsvc(void) > perf_hsvc_group = HV_GRP_VT_CPU; > break; > > + case SUN4V_CHIP_NIAGARA5: > + perf_hsvc_group = HV_GRP_T5_CPU; > + break; > default: > return -ENODEV; > } I added an empty line bfore "default:" Thanks! -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html