David, >> The idea was to also have M5 and M6-32 cpu types supported too with M7. >> >> +71: >> + ldub [%g1 + 7], %g2 >> + cmp %g1, '5' >> + be,pt %xcc, 5f >> + mov SUN4V_CHIP_SPARC_M5, %g4 >> + cmp %g1, '6' >> + be,pt %xcc, 5f >> + mov SUN4V_CHIP_SPARC_M6, %g4 >> + cmp %g2, '7' >> + be,pt %xcc, 5f >> + mov SUN4V_CHIP_SPARC_M7, %g4 >> + ba,pt %xcc, 49f >> + nop >> + > > Again, why are you bothing with a special code path at all? You don't > need to. > > Just add the M7 test to the "70:" label code block, and you're done. > I was a little confused when you initially mentioned about using "70:" label code block, now I see the point. I'll re-do the patch and test it. - Allen -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
