Re: [PATCH 1/3] sparc64: correctly recognise M7 cpu type

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On Thu, Aug 21, 2014 at 03:33:27PM +0530, Allen Pais wrote:
> 
> >> diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S
> >> index 452f04f..508a542 100644
> >> --- a/arch/sparc/kernel/head_64.S
> >> +++ b/arch/sparc/kernel/head_64.S
> >> @@ -414,6 +414,7 @@ sun4v_chip_type:
> >>  	cmp	%g2, 'T'
> >>  	be,pt	%xcc, 70f
> >>  	 cmp	%g2, 'M'
> >> +	be,pt	%xcc, 71f
> >>  	bne,pn	%xcc, 49f
> > Looks like you are missing a nop in the delay slot?
> 
>   I don't think so. I have tested the patch on M7 and I have had no issues with it.
Even if it works as expected then it is confusing.
I read the code like this:

if xcc equals pt then jump to 71 but if pn is not equal to xcc then jump to 49

Maybe the second opcode is ignored because it is a conditional jump or maybe
they are always equal.
But whatever it is confusing.

Adding an extra nop would help the readability.

	Sam
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