Re: [PATCH] sparc32: Move cache and TLB flushes over to method ops.

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From: Sam Ravnborg <sam@xxxxxxxxxxxx>
Date: Mon, 14 May 2012 12:44:50 +0200

>> [PATCH] sparc32: Implement hard_smp_processor_id() via instruction patching.
>> 
>> This is the last non-trivial user of btfixup.
>> 
>> Like sparc64, use a special patch section to resolve the various
>> implementations of how to read the current CPU's ID when we don't
>> have current_thread_info()->cpu necessarily available.
>> 
>> Signed-off-by: David S. Miller <davem@xxxxxxxxxxxxx>
> 
> Boot tested UP and SMP builds on my ss5 - works!
> 
> This variant is much easier to read/understand compared
> to the "blackbox" way!

Thanks for testing.

>> +1:	rd		%tbr, %g1
>> +	srl		%g1, 12, %o0
>> +	and		%o0, 3, %o0
>> +	.section	.cpuid_patch, "ax"
>> +	/* Instruction location. */
>> +	.word		661b
> 
> You wanted to say:  .word 1b here...

I decided to use 661: to be consistent with the LOAD_CURRENT
macro.

Fixed up and pushed out, thanks again Sam.
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