The bug seems to be that the TSB ITLB loading code mistakenly uses "andcc %reg, _PAGE_EXEC_4U..." instead of using "sethi" to load _PAGE_EXEC_4U into a register then checking the bit. andcc only supports signed 13-bit values in the immediate field. And _PAGE_EXEC_4U is bit 12. I'll work on a fix, thanks for the test cases. -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
