sparc64 with 32-bit user-space context switching question

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



I'd like to use the BR (branch on integer register)
instruction in 32-bit user-space code on sparc64.
The problem is that BR interprets the entire 64-bit
contents of the register, which depending on how
the value was produced may or may not do the right
thing in 32-bit code.

My main question is: what does the kernel do to the
high 32 bits of the 64-bit integer registers during
context switches? Does it
a) preserve all 64 bits,
b) clear the high halves (truncate to 32 bits), or
c) insert unpredictable junk?

I can handle a) and b), but c) means that I cannot
ever safely use BR in 32-bit userspace.

Also, does anyone know what Solaris does to the
high 32 bits during context switches?

/Mikael
-
To unsubscribe from this list: send the line "unsubscribe sparclinux" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[Index of Archives]     [Kernel Development]     [DCCP]     [Linux ARM Development]     [Linux]     [Photo]     [Yosemite Help]     [Linux ARM Kernel]     [Linux SCSI]     [Linux x86_64]     [Linux Hams]

  Powered by Linux