This patch sets the max_cache_size value required to tune up scheduler in SMP systems. Otherwise, the calculated migration_cost is too high and task scheduling may lock up. Signed-off-by: Krzysztof Helt <krzysztof.h1@xxxxx> --- This patch is for 2.6.17-rc5 kernel. This patch helps with Bob Breuer's patch. Default cache size (20MB) leads to calculation of the migration cost 20000 (20msecs). The calculated cost of migration is 4000 (4msecs) on dual SM81 with the patch. The same trick is used with setting up max_cache_size on i386 architecture. I assume the value should be set to on sparc64 as well to correctly tune up the scheduler. Regards, Krzysztof ---------------------------------------------------- Nowe serie superksiążek o Czarodziejkach WITCH! Poznaj świat bohaterek WITCH! Will, Irma, Taranee, Cornelia i Hay-Lin zapraszają do księgarni. http://klik.wp.pl/?adr=http%3A%2F%2Fadv.reklama.wp.pl%2Fas%2Fwitch.html&sid=781
diff -urp linux-2.6.16/arch/sparc/kernel/smp.c linux-2.6.17/arch/sparc/kernel/smp.c --- linux-2.6.16/arch/sparc/kernel/smp.c 2006-06-05 08:56:06.000000000 +0200 +++ linux-2.6.17/arch/sparc/kernel/smp.c 2006-06-05 09:15:28.000000000 +0200 @@ -69,6 +69,17 @@ void __init smp_store_cpu_info(int id) "clock-frequency", 0); cpu_data(id).prom_node = cpu_node; cpu_data(id).mid = cpu_get_hwmid(cpu_node); + + /* this is required to tune the scheduler correctly */ + /* is it possible to have CPUs with different cache sizes? */ + if (id == boot_cpu_id) { + int cache_line,cache_nlines; + cache_line = 0x20; + cache_line = prom_getintdefault(cpu_node, "ecache-line-size", cache_line); + cache_nlines = 0x8000; + cache_nlines = prom_getintdefault(cpu_node, "ecache-nlines", cache_nlines); + max_cache_size = cache_line * cache_nlines; + } if (cpu_data(id).mid < 0) panic("No MID found for CPU%d at node 0x%08d", id, cpu_node); }