On Thu, May 30, 2024 at 02:52:48PM -0700, Nathan Chancellor wrote:
> On Thu, May 30, 2024 at 10:24:05AM -0700, Paul E. McKenney wrote:
> > And for an untested first attempt at a fix.
> >
> > What did I mess up this time? ;-)
>
> An include for cmpxchg-emu.h ;)
>
> In file included from arch/arm/include/asm/atomic.h:16,
> from include/linux/atomic.h:7,
> from include/asm-generic/bitops/lock.h:5,
> from arch/arm/include/asm/bitops.h:245,
> from include/linux/bitops.h:63,
> from include/linux/log2.h:12,
> from kernel/bounds.c:13:
> arch/arm/include/asm/cmpxchg.h: In function '__cmpxchg':
> arch/arm/include/asm/cmpxchg.h:167:26: error: implicit declaration of function 'cmpxchg_emu_u8' [-Werror=implicit-function-declaration]
> 167 | oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> | ^~~~~~~~~~~~~~
> cc1: some warnings being treated as errors
Good catch, and thank you for testing this! Does the updated version
shown below do better?
Thanx, Paul
------------------------------------------------------------------------
commit 74e3470afacaa9d2f37db4773a5fef887ac4ef56
Author: Paul E. McKenney <paulmck@xxxxxxxxxx>
Date: Thu May 30 10:11:31 2024 -0700
ARM: Emulate one-byte cmpxchg
Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
with ARCH < ARMv6K.
[ paulmck: Apply Arnd Bergmann and Nathan Chancellor feedback. ]
Reported-by: Mark Brown <broonie@xxxxxxxxxx>
Closes: https://lore.kernel.org/all/54798f68-48f7-4c65-9cba-47c0bf175143@xxxxxxxxxxxxx/
Reported-by: Naresh Kamboju <naresh.kamboju@xxxxxxxxxx>
Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@xxxxxxxxxxxxxx/
Signed-off-by: Paul E. McKenney <paulmck@xxxxxxxxxx>
Cc: "Russell King (Oracle)" <rmk+kernel@xxxxxxxxxxxxxxx>
Cc: Arnd Bergmann <arnd@xxxxxxxx>
Cc: Andrew Davis <afd@xxxxxx>
Cc: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
Cc: Linus Walleij <linus.walleij@xxxxxxxxxx>
Cc: Eric DeVolder <eric.devolder@xxxxxxxxxx>
Cc: Rob Herring <robh@xxxxxxxxxx>
Cc: <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ee5115252aac4..a867a7d967aa5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -34,6 +34,7 @@ config ARM
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
+ select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
select ARCH_SUPPORTS_ATOMIC_RMW
select ARCH_SUPPORTS_CFI_CLANG
select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
index 44667bdb4707a..a428e06fe94ee 100644
--- a/arch/arm/include/asm/cmpxchg.h
+++ b/arch/arm/include/asm/cmpxchg.h
@@ -5,6 +5,7 @@
#include <linux/irqflags.h>
#include <linux/prefetch.h>
#include <asm/barrier.h>
+#include <linux/cmpxchg-emu.h>
#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
/*
@@ -162,7 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
prefetchw((const void *)ptr);
switch (size) {
-#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
+#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
+ case 1:
+ oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
+ break;
+#else /* min ARCH >= ARMv6K */
case 1:
do {
asm volatile("@ __cmpxchg1\n"
