On Tue, 2023-02-28 at 22:01 +0100, Thomas Gleixner wrote: > > This needs: > > --- a/arch/x86/kernel/head_64.S > +++ b/arch/x86/kernel/head_64.S > @@ -239,7 +239,7 @@ SYM_INNER_LABEL(secondary_startup_64_no_ > /* Get the per cpu offset for the given CPU# which is in ECX */ > movq __per_cpu_offset(,%rcx,8), %rdx > #else > - xorl %edx, %edx > + leaq INIT_PER_CPU_VAR(fixed_percpu_data)(%rip), %rdx > #endif /* CONFIG_SMP */ > > /* > So yeah, I'd frowned at the zero %edx there for a while (but evidently not long enough to realise that even if it's right it should be %rdx). But then figured it was an *offset*, that __per_cpu_offset[0] would be zero too at least on first boot and probably forever, did a quick grep for pcpu_hot and figured my brain hurt and Brian probably knew what he was doing. Empirically, yours doesn't boot and Brian's does. If I just fix it to zero all of %rdx and then run (just up to the initial_gs patch) with qemu -d in_asm ... grep gdt_page System.map ffffffff05d7a000 A init_per_cpu__gdt_page ffffffff825cfeb0 r __ksymtab_gdt_page ffffffff82811000 D gdt_page 0x060000a9: 48 c7 c0 b2 00 00 a2 movq $-0x5dffff4e, %rax 0x060000b0: ff e0 jmpq *%rax ---------------- IN: 0xffffffffa20000b2: 48 31 d2 xorq %rdx, %rdx 0xffffffffa20000b5: 48 8b 82 c0 74 d5 a3 movq -0x5c2a8b40(%rdx), %rax 0xffffffffa20000bc: 48 8b a0 58 14 00 00 movq 0x1458(%rax), %rsp 0xffffffffa20000c3: 48 83 ec 10 subq $0x10, %rsp 0xffffffffa20000c7: 66 c7 04 24 7f 00 movw $0x7f, (%rsp) 0xffffffffa20000cd: 48 8d 82 00 10 81 a3 leaq -0x5c7ef000(%rdx), %rax 0xffffffffa20000d4: 48 89 44 24 02 movq %rax, 2(%rsp) 0xffffffffa20000d9: 0f 01 14 24 lgdtq (%rsp) 0xffffffffa20000dd: 48 83 c4 10 addq $0x10, %rsp 0xffffffffa20000e1: 31 c0 xorl %eax, %eax 0xffffffffa20000e3: 8e d8 movl %eax, %ds I cannot work out where the value -0x5c7ef000 comes from, but it doesn't seem to be the 0xb000 you claimed, and my brain is hurting again...
Attachment:
smime.p7s
Description: S/MIME cryptographic signature
