On 2/6/23 11:58 AM, Kim Phillips wrote:
On 2/4/23 9:40 AM, David Woodhouse wrote:
On Fri, 2023-02-03 at 13:48 -0600, Kim Phillips wrote:
If I:
- take dwmw2's parallel-6.2-rc6 branch (commit 459d1c46dbd1)
- remove the set_cpu_bug(c, X86_BUG_NO_PARALLEL_BRINGUP) line from amd.c
Then:
- a Ryzen 3000 (Picasso A1/Zen+) notebook I have access to fails to boot.
- Zen 2,3,4-based servers boot fine
- a Zen1-based server doesn't boot.
I've changed it to use CPUID 0xb only if we're actually in x2apic mode,
which Boris tells me won't be the case on Zen1 because that doesn't
support X2APIC.
When we're not in x2apic mode, we can use CPUID 0x1 because the 8 bits
of APIC ID we find there are perfectly sufficient.
New tree in the same place as before, commit ce7e2d1e046a for the
parallel-6.2-rc6-part1 tag and 17bbd12ee03 for parallel-6.2-rc6.
Thanks, Zen 1 through 4 based servers all boot both those two tree
commits successfully.
I'll try that Ryzen again later.
The Ryzen 3000 also successfully boots those two branches now.
Thanks,
Kim
