On Wed, Jul 28, 2021 at 01:47:20PM -0700, Paul E. McKenney wrote: > On Wed, Jul 28, 2021 at 01:37:19PM -0700, Josh Triplett wrote: > > On Wed, Jul 28, 2021 at 10:37:15AM -0700, Paul E. McKenney wrote: > > > This change makes the memory ordering requirements > > > more evident, and it might well also speed up the to-idle and from-idle > > > fastpaths on some architectures. > > > > Cleaning up the memory ordering requirements certainly seems worthwhile. > > But is there any straightforward benchmark that might quantify the > > "might well also speed up" here? How much does weakening the memory > > ordering buy us, in practice? > > None that I know of! I know two: 1) The whole debate makes us review again (and again) the memory ordering requirements in RCU VS dynticks-idle, which can only be good to enforce correctness. 2) The more we weaken the ordering, the better we grasp and understand the underlying ordering requirements. Unnecessary full memory barriers tend to obfuscate our ordering expectations, making the code less self-explanatory. 3) I have terrible ideas to remove a full barrier in the dynticks idle path that should work in practice but not in theory and therefore I'm never going to talk about it unless everyone in the room is drunk.
