On Sun, 16 Mar 2025 13:51:50 +0800 Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx> wrote: > > Is there any possibility that the MD drivers will point DMA hardware at > > the global zero page, thereby invalidating that page from CPU caches in > > some manner? > > The only spots that can hand this off to DMA are: Cool, thanks for checking. > crypto/async_tx/async_pq.c: srcs[i] = (void*)raid6_empty_zero_page; > crypto/async_tx/async_raid6_recov.c: ptrs[i] = (void *) raid6_empty_zero_page; > crypto/async_tx/async_raid6_recov.c: ptrs[i] = (void*)raid6_empty_zero_page; > > But they all turn out to be synchronous fallback code paths that > do not involve DMA at all. And all three cast a pointer to a void* ;)
