Le lundi 5 d?cembre 2011 19:54:02 Arun Raghavan, vous avez ?crit : > The run-time detection is already available in the pa_cpu_info structure > in pa_core. > > At compile-time, you could follow something similar to what we've done > for some ARM instructions in configure.ac for the ssat and pkhbt > instructions -- just a small assembly fragment in a C program that can > be run through the compiler to make sure the assembler accepts it. *Ahem*. GCC exhibits rather unlike semantics for ARM and x86 SIMD assembly. On ARM, you must enable NEON in the compiler/assembler flags with "-mfpu=neon" or a variant thereof. Only then will the assembler accept NEON opcodes and the compiler accept NEON builtin instrinsics. However, the C compiler will also emit NEON instructions, so the machine code will not run on processors without NEON coprocessing. On x86, the assembler will happily accept any MMX and SSE opcode that it knows of, regardless of the compiler flags. However, the compiler will obviously follow the compiler flags or lack thereof. In particular, you still need to enable SSE with "-msse" to be able to define the clobber list for inline assembly. However, you do not need to set higher SSE versions like "-msse2". Writing an autoconf test is OK if you have a fixed target CPU at build-time. But that rarely is the case for x86. -- R?mi Denis-Courmont http://www.remlab.net/ http://fi.linkedin.com/in/remidenis
