Re: [PATCH 4/8] platform/x86/amd/pmc: Isolate STB code changes to a new file

[Mario Limonciello <mario.limonciello@xxxxxxx>]

On 10/28/2024 02:04, Shyam Sundar S K wrote:
> Since S2D (Spill to DRAM) uses different message port offsets compared to
> PMC message offsets for communication with PMFW, relocate the S2D macros
> from pmc.c to a new file, mp1_stb.c, for better code organization.
>
> Following this change, it is logical to introduce a new structure,
> "struct stb_arg," to pass the message, argument, and response offset
> details to PMFW via the amd_pmc_send_cmd() call. Additionally, move the
> s2d_msg_id member from amd_pmc_dev into the new structure.
>
> Co-developed-by: Sanket Goswami <Sanket.Goswami@xxxxxxx>
> Signed-off-by: Sanket Goswami <Sanket.Goswami@xxxxxxx>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@xxxxxxx>
Reviewed-by: Mario Limonciello <mario.limonciello@xxxxxxx>
> ---
>   drivers/platform/x86/amd/pmc/mp1_stb.c | 33 +++++++++++++++++---------
>   drivers/platform/x86/amd/pmc/pmc.c     | 12 +++++-----
>   drivers/platform/x86/amd/pmc/pmc.h     | 14 ++++++-----
>   3 files changed, 36 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/platform/x86/amd/pmc/mp1_stb.c b/drivers/platform/x86/amd/pmc/mp1_stb.c
> index 2b06861c479b..1501793b9281 100644
> --- a/drivers/platform/x86/amd/pmc/mp1_stb.c
> +++ b/drivers/platform/x86/amd/pmc/mp1_stb.c
> @@ -31,6 +31,11 @@
>   #define STB_FORCE_FLUSH_DATA	0xCF
>   #define FIFO_SIZE		4096
>   
> +/* STB S2D(Spill to DRAM) has different message port offset */
> +#define AMD_S2D_REGISTER_MESSAGE	0xA20
> +#define AMD_S2D_REGISTER_RESPONSE	0xA80
> +#define AMD_S2D_REGISTER_ARGUMENT	0xA88
> +
>   static bool enable_stb;
>   module_param(enable_stb, bool, 0644);
>   MODULE_PARM_DESC(enable_stb, "Enable the STB debug mechanism");
> @@ -176,7 +181,7 @@ static int amd_stb_debugfs_open_v2(struct inode *inode, struct file *filp)
>   		return amd_stb_handle_efr(filp);
>   
>   	/* Get the num_samples to calculate the last push location */
> -	ret = amd_pmc_send_cmd(dev, S2D_NUM_SAMPLES, &num_samples, dev->s2d_msg_id, true);
> +	ret = amd_pmc_send_cmd(dev, S2D_NUM_SAMPLES, &num_samples, dev->stb_arg.s2d_msg_id, true);
>   	/* Clear msg_port for other SMU operation */
>   	dev->msg_port = MSG_PORT_PMC;
>   	if (ret) {
> @@ -239,18 +244,24 @@ static bool amd_is_stb_supported(struct amd_pmc_dev *dev)
>   	switch (dev->cpu_id) {
>   	case AMD_CPU_ID_YC:
>   	case AMD_CPU_ID_CB:
> -		dev->s2d_msg_id = 0xBE;
> -		return true;
> +		dev->stb_arg.s2d_msg_id = 0xBE;
> +		break;
>   	case AMD_CPU_ID_PS:
> -		dev->s2d_msg_id = 0x85;
> -		return true;
> +		dev->stb_arg.s2d_msg_id = 0x85;
> +		break;
>   	case PCI_DEVICE_ID_AMD_1AH_M20H_ROOT:
>   	case PCI_DEVICE_ID_AMD_1AH_M60H_ROOT:
> -		dev->s2d_msg_id = 0xDE;
> -		return true;
> +		dev->stb_arg.s2d_msg_id = 0xDE;
> +		break;
>   	default:
>   		return false;
>   	}
> +
> +	dev->stb_arg.msg = AMD_S2D_REGISTER_MESSAGE;
> +	dev->stb_arg.arg = AMD_S2D_REGISTER_ARGUMENT;
> +	dev->stb_arg.resp = AMD_S2D_REGISTER_RESPONSE;
> +
> +	return true;
>   }
>   
>   int amd_s2d_init(struct amd_pmc_dev *dev)
> @@ -273,18 +284,18 @@ int amd_s2d_init(struct amd_pmc_dev *dev)
>   	/* Spill to DRAM feature uses separate SMU message port */
>   	dev->msg_port = MSG_PORT_S2D;
>   
> -	amd_pmc_send_cmd(dev, S2D_TELEMETRY_SIZE, &size, dev->s2d_msg_id, true);
> +	amd_pmc_send_cmd(dev, S2D_TELEMETRY_SIZE, &size, dev->stb_arg.s2d_msg_id, true);
>   	if (size != S2D_TELEMETRY_BYTES_MAX)
>   		return -EIO;
>   
>   	/* Get DRAM size */
> -	ret = amd_pmc_send_cmd(dev, S2D_DRAM_SIZE, &dev->dram_size, dev->s2d_msg_id, true);
> +	ret = amd_pmc_send_cmd(dev, S2D_DRAM_SIZE, &dev->dram_size, dev->stb_arg.s2d_msg_id, true);
>   	if (ret || !dev->dram_size)
>   		dev->dram_size = S2D_TELEMETRY_DRAMBYTES_MAX;
>   
>   	/* Get STB DRAM address */
> -	amd_pmc_send_cmd(dev, S2D_PHYS_ADDR_LOW, &phys_addr_low, dev->s2d_msg_id, true);
> -	amd_pmc_send_cmd(dev, S2D_PHYS_ADDR_HIGH, &phys_addr_hi, dev->s2d_msg_id, true);
> +	amd_pmc_send_cmd(dev, S2D_PHYS_ADDR_LOW, &phys_addr_low, dev->stb_arg.s2d_msg_id, true);
> +	amd_pmc_send_cmd(dev, S2D_PHYS_ADDR_HIGH, &phys_addr_hi, dev->stb_arg.s2d_msg_id, true);
>   
>   	stb_phys_addr = ((u64)phys_addr_hi << 32 | phys_addr_low);
>   
> diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c
> index 8e7c87505327..f9900a03391a 100644
> --- a/drivers/platform/x86/amd/pmc/pmc.c
> +++ b/drivers/platform/x86/amd/pmc/pmc.c
> @@ -450,9 +450,9 @@ static void amd_pmc_dump_registers(struct amd_pmc_dev *dev)
>   	u32 value, message, argument, response;
>   
>   	if (dev->msg_port) {
> -		message = AMD_S2D_REGISTER_MESSAGE;
> -		argument = AMD_S2D_REGISTER_ARGUMENT;
> -		response = AMD_S2D_REGISTER_RESPONSE;
> +		message = dev->stb_arg.msg;
> +		argument = dev->stb_arg.arg;
> +		response = dev->stb_arg.resp;
>   	} else {
>   		message = dev->smu_msg;
>   		argument = AMD_PMC_REGISTER_ARGUMENT;
> @@ -477,9 +477,9 @@ int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool r
>   	mutex_lock(&dev->lock);
>   
>   	if (dev->msg_port) {
> -		message = AMD_S2D_REGISTER_MESSAGE;
> -		argument = AMD_S2D_REGISTER_ARGUMENT;
> -		response = AMD_S2D_REGISTER_RESPONSE;
> +		message = dev->stb_arg.msg;
> +		argument = dev->stb_arg.arg;
> +		response = dev->stb_arg.resp;
>   	} else {
>   		message = dev->smu_msg;
>   		argument = AMD_PMC_REGISTER_ARGUMENT;
> diff --git a/drivers/platform/x86/amd/pmc/pmc.h b/drivers/platform/x86/amd/pmc/pmc.h
> index 7e7f9170124c..d3c6730ebcd7 100644
> --- a/drivers/platform/x86/amd/pmc/pmc.h
> +++ b/drivers/platform/x86/amd/pmc/pmc.h
> @@ -25,6 +25,13 @@ struct amd_mp2_dev {
>   	bool is_stb_data;
>   };
>   
> +struct stb_arg {
> +	u32 s2d_msg_id;
> +	u32 msg;
> +	u32 arg;
> +	u32 resp;
> +};
> +
>   struct amd_pmc_dev {
>   	void __iomem *regbase;
>   	void __iomem *smu_virt_addr;
> @@ -36,7 +43,6 @@ struct amd_pmc_dev {
>   	u32 active_ips;
>   	u32 dram_size;
>   	u32 num_ips;
> -	u32 s2d_msg_id;
>   	u32 smu_msg;
>   /* SMU version information */
>   	u8 smu_program;
> @@ -50,6 +56,7 @@ struct amd_pmc_dev {
>   	struct quirk_entry *quirks;
>   	bool disable_8042_wakeup;
>   	struct amd_mp2_dev *mp2;
> +	struct stb_arg stb_arg;
>   };
>   
>   void amd_pmc_process_restore_quirks(struct amd_pmc_dev *dev);
> @@ -70,11 +77,6 @@ void amd_mp2_stb_deinit(struct amd_pmc_dev *dev);
>   #define PCI_DEVICE_ID_AMD_1AH_M60H_ROOT 0x1122
>   #define PCI_DEVICE_ID_AMD_MP2_STB	0x172c
>   
> -/* STB S2D(Spill to DRAM) has different message port offset */
> -#define AMD_S2D_REGISTER_MESSAGE	0xA20
> -#define AMD_S2D_REGISTER_RESPONSE	0xA80
> -#define AMD_S2D_REGISTER_ARGUMENT	0xA88
> -
>   int amd_s2d_init(struct amd_pmc_dev *dev);
>   int amd_write_stb(struct amd_pmc_dev *dev, u32 data);
>   int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret);