Re: [RFC 1/1] platform/x86: p2sb: On Goldmont only cache P2SB and SPI devfn BAR

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On 3/5/24 01:54, Shinichiro Kawasaki wrote:
> On Mar 04, 2024 / 17:47, Hans de Goede wrote:
>> Hi All,
>> On 3/4/24 14:43, Hans de Goede wrote:
>>> On Goldmont p2sb_bar() only ever gets called for 2 devices, the actual P2SB
>>> devfn 13,0 and the SPI controller which is part of the P2SB, devfn 13,2.
>>> But the current p2sb code tries to cache BAR0 info for all of
>>> devfn 13,0 to 13,7 . This involves calling pci_scan_single_device()
>>> for device 13 functions 0-7 and the hw does not seem to like
>>> pci_scan_single_device() getting called for some of the other hidden
>>> devices. E.g. on an ASUS VivoBook D540NV-GQ065T this leads to continuous
>>> ACPI errors leading to high CPU usage.
>>> Fix this by only caching BAR0 info and thus only calling
>>> pci_scan_single_device() for the P2SB and the SPI controller.
>>> Link: [1]
>>> Fixes: 5913320eb0b3 ("platform/x86: p2sb: Allow p2sb_bar() calls during PCI device probe")
>>> Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx>
>> Good news Danil Rybakov has just confirmed in bugzilla
>> that simple patch fixes things. So IMHO this is the way
>> to move forward to fix this.
> Agreed. This simpler fix is the better.
> The functions other than 0 and 2 were totally in my blind spot.
> Thank you very much for finding out the good solution.
>> Shin'ichiro, any objections from you against this fix ?
> No objection!

Great I have merged this now and send a pull-request to Linus
with this fix:



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