https://bugzilla.kernel.org/show_bug.cgi?id=218305 --- Comment #23 from Dan Martins (dan.martins@xxxxxxxx) --- (In reply to Dan Martins from comment #21) > (In reply to Mario Limonciello (AMD) from comment #19) > > Can you please dump teh values from all of these MSR's from userspace while > > in a reproduced state? > In reproduced state, where all cores are stuck at ~544MHz, MSR_AMD_CPPC_REQ > values appear to have wrapped around? Ignore comment about values wrapping around, it appears the upper byte is set when I adjust PPD from performance (0x00) to balanced (0x80) and powersave (0xFF). I must have adjusted this between reboots. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
