On Thu, Sep 21, 2023 at 08:19:42PM +0800, Choong Yong Liang wrote: > From: "David E. Box" <david.e.box@xxxxxxxxxxxxxxx> > > - Exports intel_pmc_ipc() for host access to the PMC IPC mailbox > - Add support to use IPC command allows host to access SoC registers > through PMC firmware that are otherwise inaccessible to the host due to > security policies. > > Signed-off-by: David E. Box <david.e.box@xxxxxxxxxxxxxxx> > Signed-off-by: Chao Qin <chao.qin@xxxxxxxxx> > Signed-off-by: Choong Yong Liang <yong.liang.choong@xxxxxxxxxxxxxxx> ... > diff --git a/include/linux/platform_data/x86/intel_pmc_ipc.h b/include/linux/platform_data/x86/intel_pmc_ipc.h > new file mode 100644 > index 000000000000..25ba57b8a7ea > --- /dev/null > +++ b/include/linux/platform_data/x86/intel_pmc_ipc.h > @@ -0,0 +1,34 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Intel Core SoC Power Management Controller Header File > + * > + * Copyright (c) 2023, Intel Corporation. > + * All Rights Reserved. > + * > + * Authors: Choong Yong Liang <yong.liang.choong@xxxxxxxxxxxxxxx> > + * David E. Box <david.e.box@xxxxxxxxxxxxxxx> > + */ > +#ifndef INTEL_PMC_IPC_H > +#define INTEL_PMC_IPC_H > + > +#define IPC_SOC_REGISTER_ACCESS 0xAA > +#define IPC_SOC_SUB_CMD_READ 0x00 > +#define IPC_SOC_SUB_CMD_WRITE 0x01 > + > +struct pmc_ipc_cmd { > + u32 cmd; > + u32 sub_cmd; > + u32 size; > + u32 wbuf[4]; > +}; > + > +/** > + * intel_pmc_core_ipc() - PMC IPC Mailbox accessor nit: intel_pmc_ipc() > + * @ipc_cmd: struct pmc_ipc_cmd prepared with input to send > + * @rbuf: Allocated u32[4] array for returned IPC data > + * > + * Return: 0 on success. Non-zero on mailbox error > + */ > +int intel_pmc_ipc(struct pmc_ipc_cmd *ipc_cmd, u32 *rbuf); > + > +#endif /* INTEL_PMC_IPC_H */ > -- > 2.25.1 > >