On 6/14/2022 6:42 PM, Rajneesh Bhardwaj wrote:
Is RocketLake the same as Alder Lake N? Otherwise, it looks pretty straight forward. Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@xxxxxxxxx>
Thank you Rajneesh! I fixed the typo and posted v2.
On Tue, Jun 14, 2022 at 8:28 PM Gayatri Kammela <gayatri.kammela@xxxxxxxxxxxxxxx> wrote:Add Alder Lake N (ADL-N) to the list of the platforms that Intel's PMC core driver supports. RocketLake reuses all the TigerLake PCH IPs. Cc: Srinivas Pandruvada <srinivas.pandruvada@xxxxxxxxx> Cc: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> Cc: David E. Box <david.e.box@xxxxxxxxxxxxxxx> Signed-off-by: Gayatri Kammela <gayatri.kammela@xxxxxxxxxxxxxxx> --- drivers/platform/x86/intel/pmc/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c index 40183bda7894..a1fe1e0dcf4a 100644 --- a/drivers/platform/x86/intel/pmc/core.c +++ b/drivers/platform/x86/intel/pmc/core.c @@ -1911,6 +1911,7 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = { X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &icl_reg_map), X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &tgl_reg_map), X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &tgl_reg_map), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &tgl_reg_map), X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_reg_map), X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &tgl_reg_map), {} base-commit: b13baccc3850ca8b8cccbf8ed9912dbaa0fdf7f3 -- 2.25.1
