>> +static const struct x86_cpu_id ifs_cpu_ids[] __initconst = {
>> + X86_MATCH(SAPPHIRERAPIDS_X),
>
> Why do we need a model match here? The core capabilities MSR is only
> available when X86_FEATURE_CORE_CAPABILITIES is set:
>
> "If CPUID.(EAX=07H, ECX=0):EDX[30] = 1.
> This MSR provides an architectural enumeration
> function for model-specific behavior."
>
> So checking for Intel Fam6 ANYMODEL and X86_FEATURE_CORE_CAPABILITIES is
> sufficient, no?
IA32_CORE_CAPABILITES is a nightmare. Although it is an architectural
register, the bits inside it are model specific.
In particular bit 2 (which we check here for the existence of the INTEGRITY
MSR) has been assigned for other use on other models. See SDM volume 4
table 2-45 where bit 2 means FUSA supported on 06_8C and 06_8D (Tigerlake
mobile and desktop). Ditto in table 2-46 (Alderlake and Raptorlake).
> We really don't need more match id tables with gazillions of CPU models.
Sadly we do :-(
-Tony
