[AMD Official Use Only]
> -----Original Message-----
> From: David E. Box <david.e.box@xxxxxxxxxxxxxxx>
> Sent: Wednesday, April 20, 2022 10:56
> To: hdegoede@xxxxxxxxxx; david.e.box@xxxxxxxxxxxxxxx;
> markgross@xxxxxxxxxx; platform-driver-x86@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx
> Subject: [PATCH 2/3] platform/x86/intel/sdsi: Poll on ready bit for writes
>
> Due to change in firmware flow, update mailbox writes to poll on ready bit
> instead of run_busy bit. This change makes the polling method consistent
> for both writes and reads, which also uses the ready bit.
Does this need some sort of guard on the behavior based on the firmware
version you are running on or are these all pre-production still?
>
> Fixes: 2546c6000430 ("platform/x86: Add Intel Software Defined Silicon driver")
> Signed-off-by: David E. Box <david.e.box@xxxxxxxxxxxxxxx>
> ---
> drivers/platform/x86/intel/sdsi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/platform/x86/intel/sdsi.c b/drivers/platform/x86/intel/sdsi.c
> index 11f211402479..89729fed030c 100644
> --- a/drivers/platform/x86/intel/sdsi.c
> +++ b/drivers/platform/x86/intel/sdsi.c
> @@ -245,8 +245,8 @@ static int sdsi_mbox_cmd_write(struct sdsi_priv *priv,
> struct sdsi_mbox_info *in
> FIELD_PREP(CTRL_PACKET_SIZE, info->size);
> writeq(control, priv->control_addr);
>
> - /* Poll on run_busy bit */
> - ret = readq_poll_timeout(priv->control_addr, control, !(control &
> CTRL_RUN_BUSY),
> + /* Poll on ready bit */
> + ret = readq_poll_timeout(priv->control_addr, control, control &
> CTRL_READY,
> MBOX_POLLING_PERIOD_US,
> MBOX_TIMEOUT_US);
>
> if (ret)
> --
> 2.25.1
