v2: Delete patch to remove SCRATCH 5 NMI support check for
UV2 and UV3k systems with old NMI support function.
v3: Fix check BIOS NMI support mistake in Patch 1.
v4: Clarify commit messages and comments in all 3 patches.
We hope this addresses the issues raised by Thomas Gleixner in
https://lore.kernel.org/r/87zgl02w6v.ffs@tglx
Update NMI Handler for UV5
Update NMI handler for UV5 hardware. A platform register
changed, and UV5 only uses one of the two NMI methods used on
previous hardware.
Update TSC sync state for UV5
The UV5 platform synchronizes the TSCs among all chassis, and
will not proceed to OS boot without achieving synchronization.
Previous UV platforms provided a register indicating
successful synchronization. This is no longer available on
UV5. On this platform TSC_ADJUST should not be reset by the
kernel.
Log gap hole end size
Show value of gap end in the kernel log which equates to
number of physical address bits used by system.
Mike Travis (3):
x86/platform/uv: Update NMI Handler for UV5
x86/platform/uv: Update TSC sync state for UV5
x86/platform/uv: Log gap hole end size
arch/x86/kernel/apic/x2apic_uv_x.c | 16 +++++++++++++---
arch/x86/platform/uv/uv_nmi.c | 20 ++++++++++----------
2 files changed, 23 insertions(+), 13 deletions(-)
--
2.26.2
