On 9/14/2021 7:31 AM, Mario Limonciello wrote:
> There have been reports of approximately a 0.9%-1.7% failure rate in SMU
> communication timeouts with s0i3 entry on some OEM designs. Currently
> the design in amd-pmc is to try every 100us for up to 20ms.
>
> However the GPU driver which also communicates with the SMU using a
> mailbox register which the driver polls every 1us for up to 2000ms.
> In the GPU driver this was increased by commit 055162645a40 ("drm/amd/pm:
> increase time out value when sending msg to SMU")
>
> Increase the maximum timeout used by amd-pmc to 2000ms to match this
> behavior. This has been shown to improve the stability for machines
> that randomly have failures.
>
> Cc: stable@xxxxxxxxxx
> Reported-by: Julian Sikorski <belegdol@xxxxxxxxx>
> BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1629
> Signed-off-by: Mario Limonciello <mario.limonciello@xxxxxxx>
> ---
> drivers/platform/x86/amd-pmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c
> index 3481479a2942..d6a7c896ac86 100644
> --- a/drivers/platform/x86/amd-pmc.c
> +++ b/drivers/platform/x86/amd-pmc.c
> @@ -71,7 +71,7 @@
> #define AMD_CPU_ID_YC 0x14B5
>
> #define PMC_MSG_DELAY_MIN_US 100
> -#define RESPONSE_REGISTER_LOOP_MAX 200
> +#define RESPONSE_REGISTER_LOOP_MAX 20000
>
> #define SOC_SUBSYSTEM_IP_MAX 12
> #define DELAY_MIN_US 2000
>
Looks good to me.
Acked-by: Shyam Sundar S K <Shyam-sundar.S-k@xxxxxxx>
