> -----Original Message-----
> From: Andy Shevchenko <andy.shevchenko@xxxxxxxxx>
> Sent: Tuesday, November 13, 2018 5:22 PM
> To: Vadim Pasternak <vadimp@xxxxxxxxxxxx>
> Cc: Darren Hart <dvhart@xxxxxxxxxxxxx>; Platform Driver <platform-driver-
> x86@xxxxxxxxxxxxxxx>; Jiří Pírko <jiri@xxxxxxxxxxx>; Michael Shych
> <michaelsh@xxxxxxxxxxxx>
> Subject: Re: [PATCH platform-next v1 3/7] platform/x86: mlx-platform: Fix
> tachometer registers
>
> On Tue, Nov 13, 2018 at 3:55 PM Vadim Pasternak <vadimp@xxxxxxxxxxxx>
> wrote:
> >
> > Shift by one the registers for tachometers (7 - 12).
>
> This doesn't explain if this is dependent to a new product / firmware or how
> come that is was working (I suppose some tests had been done before sending
> patches).
It also relevant to the same new three systems, which are
about to be released.
I tested with it old register map in the lab.
Then register 0xea has been reserved for the second PWM on new modular
system (which is currently not supported in mlx-platform) and tacho 7-12
have been shifted.
>
> >
> > Fixes: 0378123c5800 ("platform/x86: mlx-platform: Add mlxreg-fan
> > platform driver activation")
> > Signed-off-by: Vadim Pasternak <vadimp@xxxxxxxxxxxx>
> > ---
> > drivers/platform/x86/mlx-platform.c | 12 ++++++------
> > 1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/platform/x86/mlx-platform.c
> > b/drivers/platform/x86/mlx-platform.c
> > index cdf4498..7e92264 100644
> > --- a/drivers/platform/x86/mlx-platform.c
> > +++ b/drivers/platform/x86/mlx-platform.c
> > @@ -86,12 +86,12 @@
> > #define MLXPLAT_CPLD_LPC_REG_TACHO4_OFFSET 0xe7
> > #define MLXPLAT_CPLD_LPC_REG_TACHO5_OFFSET 0xe8
> > #define MLXPLAT_CPLD_LPC_REG_TACHO6_OFFSET 0xe9
> > -#define MLXPLAT_CPLD_LPC_REG_TACHO7_OFFSET 0xea
> > -#define MLXPLAT_CPLD_LPC_REG_TACHO8_OFFSET 0xeb
> > -#define MLXPLAT_CPLD_LPC_REG_TACHO9_OFFSET 0xec
> > -#define MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET 0xed
> > -#define MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET 0xee
> > -#define MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET 0xef
> > +#define MLXPLAT_CPLD_LPC_REG_TACHO7_OFFSET 0xeb
> > +#define MLXPLAT_CPLD_LPC_REG_TACHO8_OFFSET 0xec
> > +#define MLXPLAT_CPLD_LPC_REG_TACHO9_OFFSET 0xed
> > +#define MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET 0xee
> > +#define MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET 0xef
> > +#define MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET 0xf0
> > #define MLXPLAT_CPLD_LPC_IO_RANGE 0x100
> > #define MLXPLAT_CPLD_LPC_I2C_CH1_OFF 0xdb
> > #define MLXPLAT_CPLD_LPC_I2C_CH2_OFF 0xda
> > --
> > 2.1.4
> >
>
>
> --
> With Best Regards,
> Andy Shevchenko
