The use \columnwidth results in too large figures in -1c and -eb
builds. Instead, use \twocolumwidth (\columnwidth of 2c build) and
make them more or less similarly scaled.
Signed-off-by: Akira Yokosawa <akiyks@xxxxxxxxx>
---
memorder/memorder.tex | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 1c85b22c..940ef401 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -2854,7 +2854,7 @@ passage of time itself as a memory-ordering operation.
\begin{figure}
\centering
-\resizebox{\columnwidth}{!}{\includegraphics{CodeSamples/cpu/data/coe-nvals}}
+\resizebox{\twocolumnwidth}{!}{\includegraphics{CodeSamples/cpu/data/coe-nvals}}
\caption{x86 CPUs Can Disagree}
\label{fig:memorder:x86 CPUs Can Disagree}
\end{figure}
@@ -2876,7 +2876,7 @@ passage of time itself as a memory-ordering operation.
\begin{figure}
\centering
-\resizebox{\columnwidth}{!}{\includegraphics{memorder/co-hopes}}
+\resizebox{.85\twocolumnwidth}{!}{\includegraphics{memorder/co-hopes}}
\caption{Is Store-to-Store Counter-Temporal on x86?}
\label{fig:memorder:Is Store-to-Store Counter-Temporal on x86?}
\end{figure}
@@ -2899,7 +2899,7 @@ passage of time itself as a memory-ordering operation.
\begin{figure}
\centering
-\resizebox{\columnwidth}{!}{\includegraphics{CodeSamples/cpu/data/coe}}
+\resizebox{\twocolumnwidth}{!}{\includegraphics{CodeSamples/cpu/data/coe}}
\caption{Store-to-Store is Counter-Temporal on x86}
\label{fig:memorder:Store-to-Store is Counter-Temporal on x86}
\end{figure}
@@ -2922,7 +2922,7 @@ passage of time itself as a memory-ordering operation.
\begin{figure}
\centering
-\resizebox{2.2in}{!}{\includegraphics{memorder/fr-hopes}}
+\resizebox{.6\twocolumnwidth}{!}{\includegraphics{memorder/fr-hopes}}
\caption{Is Load-to-Store Counter-Temporal on x86?}
\label{fig:memorder:Is Load-to-Store Counter-Temporal on x86?}
\end{figure}
@@ -2940,7 +2940,7 @@ passage of time itself as a memory-ordering operation.
\begin{figure}
\centering
-\resizebox{\columnwidth}{!}{\includegraphics{CodeSamples/cpu/data/fre}}
+\resizebox{\twocolumnwidth}{!}{\includegraphics{CodeSamples/cpu/data/fre}}
\caption{Load-to-Store is Counter-Temporal on x86}
\label{fig:memorder:Load-to-Store is Counter-Temporal on x86}
\end{figure}
@@ -2958,14 +2958,14 @@ passage of time itself as a memory-ordering operation.
\begin{figure}
\centering
-\resizebox{\columnwidth}{!}{\includegraphics{memorder/rf-hopes}}
+\resizebox{\twocolumnwidth}{!}{\includegraphics{memorder/rf-hopes}}
\caption{Is Store-to-Load Counter-Temporal on x86?}
\label{fig:memorder:Is Store-to-Load Counter-Temporal on x86?}
\end{figure}
\begin{figure}
\centering
-\resizebox{\columnwidth}{!}{\includegraphics{CodeSamples/cpu/data/rfe}}
+\resizebox{\twocolumnwidth}{!}{\includegraphics{CodeSamples/cpu/data/rfe}}
\caption{Store-to-Load is Temporal on x86}
\label{fig:memorder:Store-to-Load is Temporal on x86}
\end{figure}
base-commit: 9caac64bfabf85439c480ce928dddef969354369
--
2.34.1
