On Tue, 2023-02-07 at 19:41 -0800, Paul E. McKenney wrote: > On Wed, Feb 08, 2023 at 12:07:20AM -0300, Leonardo Brás wrote: > > Hello Paul, > > > > I have been reading the book, until I stumbled on Quick Quiz 3.7, > > Table E.1: Performance of Synchronization Mechanisms > > on 16-CPU 2.8 GHz Intel X5550 (Nehalem) System > > > > <Copying from source, since the PDF is a little tricky> > > > > The first part looks like: > > > > Clock period & 0.4 & 1.0 \\ > > Same-CPU CAS & 12.2 & 33.8 \\ > > Same-CPU lock & 25.6 & 71.2 \\ > > Blind CAS & 12.9 & 35.8 \\ > > CAS & 7.0 & 19.4 \\ > > > > In this case, what would be the last lines "Blind CAS" and "CAS" referring to ? > > > > (For a second I thought it could be "In-Core Blind CAS" and "In-Core CAS" like > > in Table 3.1, but that would not make sense: This "CAS" is faster than the > > previous "Same-CPU CAS". ) > > I was surprised myself, but those measurements are quite real. My best > guess is that the two threads in the core are able to overlap their > accesses, while the single CPU must do everything sequentially. > > Strange, but whatever the reason, true! ;-) Yeah, even more strange is that in this case Blind CAS was actually slower than CAS. Anyway, your suggestion on overlapping accesses make sense. I want to suggest a change, but it's easier to discuss this over a patch. > > Thanx, Paul Thank you! Leo
