[PATCH] whymb: fix description in DMA coherence

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CPU caches need to be flushed before DMA operations to avoid data
overwriting.

Signed-off-by: Hao Lee <haolee.swjtu@xxxxxxxxx>
---
 appendix/whymb/whymemorybarriers.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/appendix/whymb/whymemorybarriers.tex b/appendix/whymb/whymemorybarriers.tex
index b49d5fe8..4ec27962 100644
--- a/appendix/whymb/whymemorybarriers.tex
+++ b/appendix/whymb/whymemorybarriers.tex
@@ -1640,7 +1640,7 @@ future such problems:
 	in any DMA buffer before presenting that buffer to the
 	I/O device.
 	Similarly, you need to flush the CPU caches of any location
-	in any DMA buffer after DMA to that buffer completes.
+	in any DMA buffer before DMA to that buffer completes.
 	And even then, you need to be \emph{very} careful to avoid
 	pointer bugs, as even a misplaced read to an input buffer
 	can result in corrupting the data input!
-- 
2.21.0




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