Use an bib entry with live URL.
Signed-off-by: Akira Yokosawa <akiyks@xxxxxxxxx>
---
memorder/memorder.tex | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index c9c35b5b..362bff16 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -4452,7 +4452,7 @@ CPU, including those to the same variable.
\subsection{MIPS}
-The MIPS memory model~\cite[page~479]{MIPSvII-A-2017}
+The MIPS memory model~\cite[page~479]{MIPSvII-A-2016}
appears to resemble that of \ARM, Itanium, and \Power{},
being weakly ordered by default, but respecting dependencies.
MIPS has a wide variety of memory-barrier instructions, but ties them
--
2.17.1
