Re: [PATCH 0/6] ppcmem: Apply new scheme of code snippets

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On Wed, 2 Oct 2019 19:50:09 -0700, Paul E. McKenney wrote:
> On Sat, Sep 28, 2019 at 10:56:10AM +0900, Akira Yokosawa wrote:
>> Subject: [PATCH 0/6] ppcmem: Apply new scheme of code snippets
>>
>> Hi Paul,
>>
>> This patch series mostly consists of code snippet updates in
>> formal/ppcmem.tex.
>>
>> Patch #1 fixes a trivial typo in dyntickrcu.
>> Patch #2 is the main changes in this series. It also employs
>> "cleveref" way of cross references.
>>
>> Patches #3--#6 touches the text and add a couples of references
>> to PowerPC atomic updates in the Linux kernel.
>>
>> Patch #3 adds entries in bib/swtools
>> Patch #4 adds citation of Git commit in 2013
>> Patches #5 and #6 add a Quick Quiz on another missing full memory
>> barrier in the beginning. I'm not that sure the added Quick Quiz
>> makes sense, though. If it doesn't, please skip #5 and #6.
> 
> I believe that the additional Quick Quiz is worthwhile, but I felt
> the need to edit it a bit.  I have queued and pushed the result.
> Could you please double-check it?

As always, your edit looks perfect to me!

> 
> And good stuff, thank you!
> 
> 							Thanx, Paul
> 
>> I remember asking you about the difference of the code emitted by
>> an atomic built-in of PowerPC-GCC and the code in Linux kernel [1].
>> IIUC, the added references and Quick Quiz are related to the
>> question.
>>
>> [1]: https://www.spinics.net/lists/perfbook/msg02077.html
>>
>> Seeing the history of the changes and your answer to [1], I suspect
>> that now that PPC_ATOMIC_ENTRY_BARRIER is "sync", "isync" might be
>> sufficient for PPC_ATOMIC_EXIT_BARRIER. Obviously I'm not an expert
>> of PowerPC and can be missing something, but I couldn't help
>> mentioning.

Now I think I finally understand that PPC_ATOMIC_EXIT_BARRIER needs to
be "sync".

Semantics of __ATOMIC_SEQ_CST of GCC's atomic built-in:

__ATOMIC_SEQ_CST:

    Enforces total ordering with all other __ATOMIC_SEQ_CST operations. 

OTOH, Linux kernel's value-returning atomic RMW operations need to be
strongly ordered from any observer.  So their semantics are different.

        Thanks, Akira

>>
>>         Thanks, Akira
>> --
>> Akira Yokosawa (6):
>>   dyntickrcu: Fix trivial typo
>>   ppcmem: Apply new scheme of code snippets
>>   bib/swtools: Add refereneces to PowerPC atomic RMW fixes
>>   ppcmem: Cite Git commit of PowerPC atomic_xxx_return fix
>>   ppcmem: Add Quick Quiz on lwsync in Listing 12.23
>>   ppcmem: Move final sentence of Answer to QQZ 12.27 to the next
>>
>>  bib/swtools.bib       |  33 +++++++
>>  formal/dyntickrcu.tex |   2 +-
>>  formal/ppcmem.tex     | 210 +++++++++++++++++++++++-------------------
>>  3 files changed, 149 insertions(+), 96 deletions(-)
>>
>> -- 
>> 2.17.1
>>




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