Signed-off-by: SeongJae Park <sj38.park@xxxxxxxxx>
---
memorder/memorder.tex | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 11fa280..28faeec 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -4260,7 +4260,7 @@ and store-release (\co{STLLRB}, \co{STLLRH}, and \co{STLLR})
instructions.
These instructions act as ``half memory barriers'', so that
ARMv8 CPUs can reorder previous accesses with a later \co{LDLAR}
-instruction, but are prohibited from reordering an earlier \co{LDAR}
+instruction, but are prohibited from reordering an earlier \co{LDLAR}
instruction with later accesses, as fancifully depicted in
Figure~\ref{fig:memorder:Half Memory Barrier}.
Similarly, ARMv8 CPUs can reorder an earlier \co{STLLR} instruction with
--
2.10.0
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