>From 9b6444fcf2c6a57c2edb88ed81f0b35231a03d10 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@xxxxxxxxx>
Date: Sat, 22 Apr 2017 00:19:54 +0900
Subject: [PATCH 3/4] whymb: Prevent line breaks between "bcr" and "15,0"
Signed-off-by: Akira Yokosawa <akiyks@xxxxxxxxx>
---
appendix/whymb/whymemorybarriers.tex | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/appendix/whymb/whymemorybarriers.tex b/appendix/whymb/whymemorybarriers.tex
index 502e37f..96daa7b 100644
--- a/appendix/whymb/whymemorybarriers.tex
+++ b/appendix/whymb/whymemorybarriers.tex
@@ -2345,7 +2345,7 @@ mainframe family, previously
known as the 360, 370, and 390~\cite{IBMzSeries04a}.
Parallelism came late to zSeries, but given that these mainframes first
shipped in the mid 1960s, this is not saying much.
-The \co{bcr 15,0} instruction is used for the Linux \co{smp_mb()},
+The \qco{bcr 15,0} instruction is used for the Linux \co{smp_mb()},
\co{smp_rmb()}, and \co{smp_wmb()} primitives.
It also has comparatively strong memory-ordering semantics, as shown in
Table~\ref{tab:app:whymb:Summary of Memory Ordering}, which should allow the
@@ -2363,7 +2363,7 @@ That said, many actual zSeries machines do in fact accommodate self-modifying
code without serializing instructions.
The zSeries instruction set provides a large set of serializing instructions,
including compare-and-swap, some types of branches (for example, the
-aforementioned \co{bcr 15,0} instruction), and test-and-set,
+aforementioned \qco{bcr 15,0} instruction), and test-and-set,
among others.
\section{Are Memory Barriers Forever?}
--
2.7.4
--
To unsubscribe from this list: send the line "unsubscribe perfbook" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
