>From 26833e78b20ac0e7ebf5276fc1e45c9875b067c7 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@xxxxxxxxx>
Date: Sun, 19 Mar 2017 23:29:37 +0900
Subject: [PATCH 4/6] whymb: Use 'nextline' style for 'description'
This list looks better in "nextline" style.
Also use \tco{} macro in labels and remove escapes of underscore.
Signed-off-by: Akira Yokosawa <akiyks@xxxxxxxxx>
---
appendix/whymb/whymemorybarriers.tex | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/appendix/whymb/whymemorybarriers.tex b/appendix/whymb/whymemorybarriers.tex
index 90da0df..9015a85 100644
--- a/appendix/whymb/whymemorybarriers.tex
+++ b/appendix/whymb/whymemorybarriers.tex
@@ -2092,26 +2092,26 @@ not to hardware considerations, but rather to the use cases provided
by the Linux kernel and the C++11 standard~\cite{RichardSmith2015N4527}
in a manner similar to the ARM64 additions:
-\begin{description}
-\item[SYNC]
+\begin{description}[style=nextline]
+\item[\tco{SYNC}]
Full barrier for a number of hardware operations in addition
to memory references.
-\item[SYNC\_WMB]
+\item[\tco{SYNC_WMB}]
Write memory barrier, which can be used to implement the
\co{smp_wmb()} primitive in the Linux kernel.
-\item[SYNC\_MB]
+\item[\tco{SYNC_MB}]
Full memory barrier, but only for memory operations.
This may be used to implement the Linux-kernel \co{smp_mb()}
and the C++ \co{atomic_thread_fence(memory_order_seq_cst)}.
-\item[SYNC\_ACQUIRE]
+\item[\tco{SYNC_ACQUIRE}]
Acquire memory barrier, which may be used to implement the
Linux-kernel \co{smp_load_acquire()} and the C++
\co{atomic_load_explicit(..., memory_order_acquire)}.
-\item[SYNC\_RELEASE]
+\item[\tco{SYNC_RELEASE}]
Release memory barrier, which may be used to implement the
Linux-kernel \co{smp_store_release()} and the C++
\co{atomic_store_explicit(..., memory_order_release)}.
-\item[SYNC\_RMB]
+\item[\tco{SYNC_RMB}]
Read memory barrier, which can be used to implement the
\co{smp_rmb()} primitive in the Linux kernel.
\end{description}
--
2.7.4
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