`Why memory barriers?` appendix uses the term `Store buffer`
consistently. However, few sentences use another term, `Write buffer`.
Change it to `Store buffer` for consistent term usage.
Signed-off-by: SeongJae Park <sj38.park@xxxxxxxxx>
---
appendix/whymb/whymemorybarriers.tex | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/appendix/whymb/whymemorybarriers.tex b/appendix/whymb/whymemorybarriers.tex
index 8025bec..38ffad6 100644
--- a/appendix/whymb/whymemorybarriers.tex
+++ b/appendix/whymb/whymemorybarriers.tex
@@ -2232,10 +2232,10 @@ thus fully ordering memory operations.
So, why is {\tt membar \#MemIssue} needed?
Because a {\tt membar \#StoreLoad} could permit a subsequent
-load to get its value from a write buffer, which would be
+load to get its value from a store buffer, which would be
disastrous if the write was to an MMIO register that induced side effects
on the value to be read.
-In contrast, {\tt membar \#MemIssue} would wait until the write buffers
+In contrast, {\tt membar \#MemIssue} would wait until the store buffers
were flushed before permitting the loads to execute,
thereby ensuring that the load actually gets its value from the MMIO register.
Drivers could instead use {\tt membar \#Sync}, but the lighter-weight
--
1.9.1
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