Signed-off-by: Emilio G. Cota <cota@xxxxxxxxx>
---
advsync/memorybarriers.tex | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/advsync/memorybarriers.tex b/advsync/memorybarriers.tex
index cc11323..e8666db 100644
--- a/advsync/memorybarriers.tex
+++ b/advsync/memorybarriers.tex
@@ -1293,7 +1293,7 @@ STORE *X = c, d = LOAD *X
\end{minipage}
\vspace{5pt}
- (Loads and stores overlap if they are targetted at overlapping pieces of
+ (Loads and stores overlap if they are targeted at overlapping pieces of
memory).
\item A series of stores to a single variable will appear to all
CPUs to have occurred in a single order, though this order
--
1.9.1
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